Patents by Inventor Stefan Sahl
Stefan Sahl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11018747Abstract: A method and system of a configurable phased array transceiver are provided. A first beamforming unit is configured to provide a first beam. A second beamforming unit is configured to provide a second beam. A first bi-directional power controller is configured to combine or to split the first beam and the second beam. Each beamforming unit comprises a plurality of radio frequency (RF) front-ends, each front-end being configured to transmit and receive RF signals. Each beam is independently configurable to operate in a transmit (TX) or a receive (RX) mode.Type: GrantFiled: August 2, 2019Date of Patent: May 25, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel J. Friedman, Joakim Hallin, Yahya Mesgarpour Tousi, Orjan Renstrom, Leonard Rexberg, Scott K. Reynolds, Bodhisatwa Sadhu, Stefan Sahl, Jan-Erik Thillberg, Alberto Valdes Garcia
-
Publication number: 20190356375Abstract: A method and system of a configurable phased array transceiver are provided. A first beamforming unit is configured to provide a first beam. A second beamforming unit is configured to provide a second beam. A first bi-directional power controller is configured to combine or to split the first beam and the second beam. Each beamforming unit comprises a plurality of radio frequency (RF) front-ends, each front-end being configured to transmit and receive RF signals. Each beam is independently configurable to operate in a transmit (TX) or a receive (RX) mode.Type: ApplicationFiled: August 2, 2019Publication date: November 21, 2019Inventors: Daniel J. Friedman, Joakim Hallin, Yahya Mesgarpour Tousi, Orjan Renstrom, Leonard Rexberg, Scott K. Reynolds, Bodhisatwa Sadhu, Stefan Sahl, Jan-Erik Thillberg, Alberto Valdes Garcia
-
Patent number: 10425143Abstract: A method and system of a configurable phased array transceiver are provided. A first beamforming unit is configured to provide a first beam. A second beamforming unit is configured to provide a second beam. A first bi-directional power controller is configured to combine or to split the first beam and the second beam. Each beamforming unit comprises a plurality of radio frequency (RF) front-ends, each front-end being configured to transmit and receive RF signals. Each beam is independently configurable to operate in a transmit (TX) or a receive (RX) mode.Type: GrantFiled: May 16, 2017Date of Patent: September 24, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel J. Friedman, Joakim Hallin, Yahya Mesgarpour Tousi, Örjan Renström, Leonard Rexberg, Scott K. Reynolds, Bodhisatwa Sadhu, Stefan Sahl, Jan-Erik Thillberg, Alberto Valdes Garcia
-
Publication number: 20180069309Abstract: A method and system of a configurable phased array transceiver are provided. A first beamforming unit is configured to provide a first beam. A second beamforming unit is configured to provide a second beam. A first bi-directional power controller is configured to combine or to split the first beam and the second beam. Each beamforming unit comprises a plurality of radio frequency (RF) front-ends, each front-end being configured to transmit and receive RF signals. Each beam is independently configurable to operate in a transmit (TX) or a receive (RX) mode.Type: ApplicationFiled: May 16, 2017Publication date: March 8, 2018Inventors: Daniel J. Friedman, Joakim Hallin, Yahya Mesgarpour Tousi, Örjan Renström, Leonard Rexberg, Scott K. Reynolds, Bodhisatwa Sadhu, Stefan Sahl, Jan-Erik Thillberg, Alberto Valdes Garcia
-
Patent number: 9660583Abstract: It is presented a signal generator for providing a first signal on a first output and a second signal on a second output wherein the first signal and the second signal are provided with phase shift relative to each other. The signal generator comprises: a control loop controller; a comparator; a phase shifter, the phase shifter being arranged to provide the first signal on the first output and the second signal on the second output; and a phase error detector, the inputs of which are connected to the outputs of the phase shifter and the output of which is connected to an input of the control loop controller. The output of the control loop controller is connected in a feedback loop to a first input of the comparator, and a second input of the comparator is arranged to be connected to an alternating current source.Type: GrantFiled: October 11, 2013Date of Patent: May 23, 2017Assignee: Telefonaktiebolaget L M Ericsson (publ)Inventors: Reza Bagger, Stefan Sahl
-
Publication number: 20160254784Abstract: It is presented a signal generator for providing a first signal on a first output and a second signal on a second output wherein the first signal and the second signal are provided with phase shift relative to each other. The signal generator comprises: a control loop controller; a comparator; a phase shifter, the phase shifter being arranged to provide the first signal on the first output and the second signal on the second output; and a phase error detector, the inputs of which are connected to the outputs of the phase shifter and the output of which is connected to an input of the control loop controller. The output of the control loop controller is connected in a feedback loop to a first input of the comparator, and a second input of the comparator is arranged to be connected to an alternating current source.Type: ApplicationFiled: October 11, 2013Publication date: September 1, 2016Inventors: Reza BAGGER, Stefan SAHL
-
Patent number: 8768280Abstract: The present invention relates to automatic gain control methods and apparatus for controlling a signal level of a signal at a predetermined location in a signal path of a receiver chain. An automatic gain controller comprises a local signal modifier device for selecting based on an error signal and an oscillator signal from a plurality of alternative oscillator signals, and for providing the selected oscillator signal to a signal mixer located in the receiver chain upstream of said predetermined location for frequency translation of an input signal to said signal mixer.Type: GrantFiled: December 30, 2009Date of Patent: July 1, 2014Assignee: Optis Cellular Technology, LLCInventor: Stefan Sahl
-
Publication number: 20120264386Abstract: The present invention relates to automatic gain control methods and apparatus for controlling a signal level of a signal at a predetermined location in a signal path of a receiver chain. An automatic gain controller comprises a local signal modifier device for selecting based on an error signal eg and an oscillator signal from a plurality of alternative oscillator signals, and for providing the selected oscillator signal as to a signal mixer located in the receiver chain upstream of said predetermined location for frequency translation of an input signal to said signal mixer.Type: ApplicationFiled: December 30, 2009Publication date: October 18, 2012Inventor: Stefan Sahl
-
Patent number: 7025615Abstract: A method in the fabrication of an integrated bipolar circuit for forming a p/n-junction varactor is disclosed. The method featuring the steps of providing a p-doped substrate (10; 10, 41); forming a buried n+-doped region (31) in the substrate; forming in the substrate an n-doped region (41) above the buried n+-doped region (31); forming field isolation (81) around the n-doped region (41); multiple ion implanting the n-doped region (41); forming a p+-doped region (151) on the n-doped region (41); forming an n+-doped contact region to the buried n+-doped region (31), the contact region being separated from the n-doped region (41); and heat treating the hereby obtained structure to set the doping profiles of the doped regions. The multiple ion implantation of the n-doped region (41); the formation of the p+-doped region (151); and the heat treatment are performed to obtain a hyper-abrupt p+/n-junction within the n-doped region (41).Type: GrantFiled: June 22, 2004Date of Patent: April 11, 2006Assignee: Infineon Technologies AGInventors: Ted Johansson, Hans Norström, Stefan Sahl
-
Publication number: 20040235257Abstract: A method in the fabrication of an integrated bipolar circuit for forming a p/n-junction varactor is disclosed. The method featuring the steps of providing a p-doped substrate (10; 10, 41); forming a buried n+-doped region (31) in the substrate; forming in the substrate an n-doped region (41) above the buried n+-doped region (31); forming field isolation (81) around the n-doped region (41); multiple ion implanting the n-doped region (41); forming a p+-doped region (151) on the n-doped region (41); forming an n+-doped contact region to the buried n+-doped region (31), the contact region being separated from the n-doped region (41); and heat treating the hereby obtained structure to set the doping profiles of the doped regions. The multiple ion implantation of the n-doped region (41); the formation of the p+-doped region (151); and the heat treatment are performed to obtain a hyper-abrupt p+/n-junction within the n-doped region (41).Type: ApplicationFiled: June 22, 2004Publication date: November 25, 2004Inventors: Ted Johansson, Hans Norstrom, Stefan Sahl
-
Patent number: 5633878Abstract: A self-diagnostic asynchronous data buffer includes an addressable buffer having a write address determined by a write counter and a read address determined by a read counter. A write clock controls storage into the buffer and updating of the write counter. A read clock controls reading from the buffer and updating of the read counter. The self-diagnostic asynchronous data buffer additionally has a test register, an address counter, and a state machine. To determine whether a hardware fault exists, the state machine compares the address counter output with the output of the write counter. When the two are equal, the next write to the addressable buffer causes the input data to also be stored in the test register. Next, the address counter output is compared with the output of the read counter. When the two addresses are equal, the output data from the addressable buffer is compared to the value stored in the test register. Inequality between these two values indicates a hardware fault.Type: GrantFiled: January 20, 1995Date of Patent: May 27, 1997Assignee: Telefonaktiebolaget LM EricssonInventors: Mats Ernkell, Stefan Sahl