Patents by Inventor Stefano D'Agostino

Stefano D'Agostino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136987
    Abstract: Amplifiers with temperature-adaptive gain and peaking gain control are described. In one example, a temperature-adaptive amplifier includes an amplifier, a temperature sense circuit, and a peaking control level shifter to bias shift the output of the amplifier and adjust a peaking gain of the amplifier based on the temperature control signal. The peaking control level shifter can adjust a peaking gain of the amplifier based on the temperature control signal. The temperature-adaptive control can help to compensate for peaking gain in amplifiers based on the operating temperature of the amplifier. The control can help to compensate for unwanted changes in amplifier peaking gain, over time, resulting in more consistent peaking gain over the full operating frequency range of amplifiers.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: Duy P. Nguyen, Nguyen L.K. Nguyen, Thanh T. Pham, Trong Phan, Stefano D'Agostino, Wayne Kennan
  • Publication number: 20210211204
    Abstract: A coupling system in an integrated circuit to block DC components from an amplifier without large costly external coupling capacitors. An input receives an input signal which has a DC component. A first impedance element receives the input signal and blocks the DC component while a second impedance element connects between the output of the first impedance matching element and a ground node. The second impedance element and the first impedance element form a voltage divider network. The first and second impedance element are integrated elements. The amplifier receives the input signal after the DC component is blocked. The first impedance element and the second impedance element may comprise a resistor in series with a capacitor. In a differential pair configuration, an impedance matching element interconnects between a first path and a second path to impedance match the amplifier to a data source.
    Type: Application
    Filed: May 30, 2019
    Publication date: July 8, 2021
    Inventors: BAOTOAN NGUYEN, Stefano D'Agostino, Toshi Omori, Ashok K. Verma
  • Patent number: 10068817
    Abstract: A semiconductor package and die assembly with a package having an exterior surface and an interior space, the interior space defined by a first side wall, and a second side wall that opposes the first side wall. Also part of the assembly is a package floor and a package ceiling. The package floor includes package floor conductors. The package ceiling opposes the package floor and includes package ceiling conductors in the package ceiling. One or more semiconductor dies are on the floor of the package floor. Electrical conductors electrically connect the one or more floor dies to the package floor conductors. One or more semiconductor dies are located on the package ceiling. Electrical conductors are configured to electrically connect the one or more ceiling dies to the package ceiling conductors. An air space is located between the package floor and the package ceiling.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: September 4, 2018
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Paul Bovaird, Stefano D'Agostino, Vikas Manan
  • Publication number: 20170271221
    Abstract: A semiconductor package and die assembly with a package having an exterior surface and an interior space, the interior space defined by a first side wall, and a second side wall that opposes the first side wall. Also part of the assembly is a package floor and a package ceiling. The package floor includes package floor conductors. The package ceiling opposes the package floor and includes package ceiling conductors in the package ceiling. One or more semiconductor dies are on the floor of the package floor. Electrical conductors electrically connect the one or more floor dies to the package floor conductors. One or more semiconductor dies are located on the package ceiling. Electrical conductors are configured to electrically connect the one or more ceiling dies to the package ceiling conductors. An air space is located between the package floor and the package ceiling.
    Type: Application
    Filed: March 20, 2017
    Publication date: September 21, 2017
    Inventors: Paul Bovaird, Stefano D'Agostino, Vikas Manan
  • Patent number: 8606407
    Abstract: An energy management gateway is provided. The energy management gateway includes a memory, a processor coupled to the memory, a building management system (BMS) interface executed by the processor and an energy management system interface executed by the processor. The BMS interface is configured to receive a first message, the first message being structured according to an industrial protocol. The energy management interface is configured to translate the first message into a second message structured according to an energy management protocol different from the industrial protocol, the second message including a query comprising at least one command and a set of qualifiers, the query being addressed to at least one first endpoint and to provide the second message to a first domain member of a first domain including the at least one first endpoint, the first domain member being a device other than the at least one first endpoint.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: December 10, 2013
    Assignee: Schneider Electric Buildings, LLC
    Inventors: William Anthony White, III, Stefano D'Agostino, Paul Stuart Bates
  • Publication number: 20120323368
    Abstract: An energy management gateway is provided. The energy management gateway includes a memory, a processor coupled to the memory, a building management system (BMS) interface executed by the processor and an energy management system interface executed by the processor. The BMS interface is configured to receive a first message, the first message being structured according to an industrial protocol. The energy management interface is configured to translate the first message into a second message structured according to an energy management protocol different from the industrial protocol, the second message including a query comprising at least one command and a set of qualifiers, the query being addressed to at least one first endpoint and to provide the second message to a first domain member of a first domain including the at least one first endpoint, the first domain member being a device other than the at least one first endpoint.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Inventors: William Anthony White, III, Stefano D'Agostino, Paul Stuart Bates
  • Patent number: 6794934
    Abstract: Methods and circuitry for implementing monolithic high gain wideband amplifiers. The invention implements an amplifier with a limiter that also performs a signal dividing function. In a specific embodiment, the limiter is designed to make available two in-phase outputs that are then used to drive two gate input lines of a combiner distributed amplifier.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: September 21, 2004
    Assignee: iTerra Communications, LLC
    Inventors: Andrea Betti-Berutto, Stefano D'Agostino
  • Publication number: 20030112075
    Abstract: Methods and circuitry for implementing monolithic high gain wideband amplifiers. The invention implements an amplifier with a limiter that also performs a signal dividing function. In a specific embodiment, the limiter is designed to make available two in-phase outputs that are then used to drive two gate input lines of a combiner distributed amplifier.
    Type: Application
    Filed: December 14, 2001
    Publication date: June 19, 2003
    Applicant: iTerra Communications, LLC
    Inventors: Andrea Betti-Berutto, Stefano D'Agostino