Abstract: An automated testing system comprises a high side switch circuit coupled to an input/output (I/O) connection, a low side switch circuit coupled to the I/O connection, a high side force amplifier (HFA) coupled to the high side switch, a low side force amplifier (LFA) coupled to the low side switch, an adjusting circuit coupled to the HFA and the LFA, and a control circuit configured to change the adjusting circuit to change control of current at the I/O connection from one of the HFA or LFA to the other of the HFA or LFA.

Abstract: A clamp circuit comprises an output transistor and a replica transistor coupled as a current minor pair, wherein the replica transistor is scaled in size to the output transistor by a size ratio; a first current source configured to set a current in the replica transistor, wherein the output current is set at a clamped output current value that is a sum of current of the first current source and a scaled value of the current of the first current source determined according to the size ratio; and a register circuit, wherein a register value stored in the register circuit sets the clamped output current value.

Abstract: An automated testing system comprises a high side switch circuit coupled to an input/output (I/O) connection, a low side switch circuit coupled to the I/O connection, a high side force amplifier (HFA) coupled to the high side switch, a low side force amplifier (LFA) coupled to the low side switch, an adjusting circuit coupled to the HFA and the LFA, and a control circuit configured to change the adjusting circuit to change control of current at the I/O connection from one of the HFA or LFA to the other of the HFA or LFA.

Abstract: Techniques are provided for changing a range of an output circuit with little or no voltage or current glitch. In an example, a method of changing a range of an output signal can include providing a first level of the output signal at an output of a first amplifier based on a received setpoint signal and receiving a range change command. In response to the range change command an input of a second amplifier can be shorted to an output of the second amplifier for a first interval. At the end of the first interval and over a second interval, a first impedance between the input of the second amplifier and the output of the second amplifier can be increased, and a second impedance between the input of the second amplifier and the setpoint signal can be increased.

Abstract: Techniques are provided for changing a range of an output circuit with little or no voltage or current glitch. In an example, a method of changing a range of an output signal can include providing a first level of the output signal at an output of a first amplifier based on a received setpoint signal and receiving a range change command. In response to the range change command an input of a second amplifier can be shorted to an output of the second amplifier for a first interval. At the end of the first interval and over a second interval, a first impedance between the input of the second amplifier and the output of the second amplifier can be increased, and a second impedance between the input of the second amplifier and the setpoint signal can be increased.

Abstract: A system and method for controlling current-range switching to limit glitching includes a sense array connected between an input and a load. The sense array includes a parallel first and second branch circuits. The first branch circuit includes at least one first transistor, a first sense resistor, and a variable impedance control circuit. The variable impedance control circuit is configured to receive a control signal and generate a gate voltage of the at least one first transistor to establish an impedance of the sense array between the input and the load that is proportional to the control signal, including controlling the gate voltage of the at least one first transistor such that an impedance of the sense array transitions from a first value to a second value when connecting or disconnecting the first branch circuit between the input and the load while the input is connected to the load through the second branch circuit.

Abstract: Apparatus and methods for loss of signal detection are provided. In one embodiment, a detection circuit for monitoring an input includes a small signal boost circuit, a rectifier circuit, a low-pass filter, and one or more comparators. The small signal boost circuit can generate an amplified signal by providing a first amount of gain to an input signal when the input signal is relatively small, but can saturate and provide reduced gain without external gain control adjustment when the input signal does not have a relatively small magnitude. The rectifier circuit can rectify the boosted signal to generate a rectified signal, and the low-pass filter can filter the rectified signal to generate a filtered signal. The one or more comparators can compare the filtered signal to one or more decision threshold voltages to determine the presence or absence of the input signal on the input.

Abstract: Apparatus and methods for loss of signal detection are provided. In one embodiment, a detection circuit for monitoring an input includes a small signal boost circuit, a rectifier circuit, a low-pass filter, and one or more comparators. The small signal boost circuit can generate an amplified signal by providing a first amount of gain to an input signal when the input signal is relatively small, but can saturate and provide reduced gain without external gain control adjustment when the input signal does not have a relatively small magnitude. The rectifier circuit can rectify the boosted signal to generate a rectified signal, and the low-pass filter can filter the rectified signal to generate a filtered signal. The one or more comparators can compare the filtered signal to one or more decision threshold voltages to determine the presence or absence of the input signal on the input.

Abstract: Apparatus and methods for frequency compensation of an amplifier are provided. In one embodiment, an integrated circuit (IC) includes an amplifier configured to amplify an input signal to generate an output signal. The IC further includes an output pad configured to receive an output signal from the amplifier and a control pad for controlling the closed-loop bandwidth of the amplifier. A compensation capacitor is electrically connected between an input of the inverting amplification block and an output of the inverting amplification block, and a switchable capacitor is electrically connected between the input of the inverting amplification block and the control pad. The control pad can be electrically connected to a DC voltage source or to the output pad to control the amplifier's closed-loop bandwidth.

Abstract: Apparatus and methods for frequency compensation of an amplifier are provided. In one embodiment, an integrated circuit (IC) includes an amplifier configured to amplify an input signal to generate an output signal. The IC further includes an output pad configured to receive an output signal from the amplifier and a control pad for controlling the closed-loop bandwidth of the amplifier. A compensation capacitor is electrically connected between an input of the inverting amplification block and an output of the inverting amplification block, and a switchable capacitor is electrically connected between the input of the inverting amplification block and the control pad. The control pad can be electrically connected to a DC voltage source or to the output pad to control the amplifier's closed-loop bandwidth.

Abstract: An Early voltage and beta current compensated cascode current mirror includes a cascode current mirror having an input stage responsive to an input current, a current mirror circuit having a first stage responsive to the input stage and a second stage responsive to the first stage, and an output stage responsive to the second stage for providing an output voltage and current; and a compensation circuit, responsive to the cascode current mirror, having a first compensation stage, a second compensation stage and a bootstrapping buffer, the first compensation stage, in response to a change in the output voltage, impressing a corresponding change in voltage on the second compensation stage, the second compensation stage thereby providing a change in current to the cascode current mirror for cancelling current errors induced by base current modulation in the output stage, the bootstrapping buffer, in response to the change in voltage, impressing a corresponding change in voltage on the first compensation stage to