Abstract: A data memory comprising a main data memory (2) consisting of a plurality of data memory units, a redundancy data memory (3) consisting of several redundancy data memory units which replace defective data memory units of the main data memory (2), and a redundancy control logic (4) which is used to control access to the redundancy data memory (4).

Abstract: The testable read-only memory for data memory redundant logic has read-only memory units for storage of determined fault addresses of faulty data memory units. The serviceability of each read-only memory unit can be checked by application of input test data and by comparison of read output test data with expected nominal output test data.

Abstract: An electronic amplifier circuit according to the principle of current detection is coupled to a memory cell field and has an input transistor for each respective row or column of the matrix array. The input transistor is connected to the respective row or column and can be driven and switched by a control signal of a multiplexer circuit. The amplifier circuit may be constructed as a gate circuit or as a transistor diode circuit. A matrix array of memory cells and a matrix array of photodetectors are also provided.

Abstract: A memory device has a read amplifier with either a variable input resistance and/or the input connections that may be linked to one or both poles of a voltage source using one or more transistors. Additionally, or alternatively the read amplifier is also applied in the decoder devices for choosing the memory cell to he read out or to be written to.

Abstract: An amplifier circuit configuration includes a data line for transmitting a data signal. The data line is connected to a data signal input of an amplifier by way of a switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier with a terminal for a control signal. The terminal for the control signal of the control circuit is connected, parallel to the switching device, to the data line. As a consequence, a switching device, which is connected between the data line and the amplifier, has only little influence on the dynamic response when reading out a data signal.

Abstract: An electronic amplifier circuit according to the principle of current detection is coupled to a memory cell field and has an input transistor for each respective row or column of the matrix array. The input transistor is connected to the respective row or column and can be driven and switched by a control signal of a multiplexer circuit. The amplifier circuit may be constructed as a gate circuit or as a transistor diode circuit. A matrix array of memory cells and a matrix array of photodetectors are also provided.

Abstract: An amplifier circuit configuration includes a data line for transmitting a data signal. The data line is connected to a data signal input of an amplifier by way of a switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier with a terminal for a control signal. The terminal for the control signal of the control circuit is connected, parallel to the switching device, to the data line. As a consequence, a switching device, which is connected between the data line and the amplifier, has only little influence on the dynamic response when reading out a data signal.