Abstract: A switch activation system including a charge pump, a load monitor, and a switch driver. The charge pump drives a negative voltage node to a predetermined negative voltage level. The load monitor monitors the charge pump and to assert a break done signal after the charge pump begins driving the negative voltage back to the predetermined negative voltage level after being increased. The switch driver turns on a first electronic switch in response to assertion of a corresponding activation signal and assertion of the break done signal. The break done signal is asserted only after electronic switches being turned off are fully turned off to avoid conflict. The charge pump operates at a frequency based on a difference between a voltage level of the negative voltage node and the predetermined negative voltage level to drive the negative voltage node back to its predetermined level within a predetermined period of time.

Abstract: A first three state driver injects a first clock signal into a crystal through an input node during a startup phase of a crystal oscillator and a second three state driver injects a second signal into the crystal through an output node during the startup phase. The first and second signals are anti-phase signals. The crystal oscillator circuit includes a first amplifier that is used during starting up and steady-state operation and includes a second amplifier. The injection through the input and output nodes is disabled after a fixed time. After injection ends, the second amplifier is turned on if voltage on the output node has reached a desired voltage and left off otherwise. If the second amplifier is turned on, the second amplifier is turned off when the voltage on the output node reaches the desired voltage.

Abstract: A switch activation system including a charge pump, a load monitor, and a switch driver. The charge pump drives a negative voltage node to a predetermined negative voltage level. The load monitor monitors the charge pump and to assert a break done signal after the charge pump begins driving the negative voltage back to the predetermined negative voltage level after being increased. The switch driver turns on a first electronic switch in response to assertion of a corresponding activation signal and assertion of the break done signal. The break done signal is asserted only after electronic switches being turned off are fully turned off to avoid conflict. The charge pump operates at a frequency based on a difference between a voltage level of the negative voltage node and the predetermined negative voltage level to drive the negative voltage node back to its predetermined level within a predetermined period of time.

Abstract: An apparatus includes an amplifier. The amplifier has two inputs, and an output. The amplifier has a pole in its transfer function. The frequency of the pole depends on the output current of the amplifier. The amplifier further includes a pole frequency tracking (PFT) circuit. The PFT circuit includes a source follower circuit.

Abstract: An integrated circuit including a functional circuit including at least one swapping circuit node, multiple duplicate electronic circuits, and a switch circuit. The duplicate electronic circuits are integrated in close proximity with each other each including at least one electronic device that is susceptible to RTN. The switch circuit electrically couples a different selected subset of at least one of the duplicate electronic circuits to the at least one swapping circuit node for each of successive switching states during operation of the functional circuit. A method of reducing noise including selecting a subset of the duplicate electronic circuits, electrically coupling the selected duplicate electronic devices to at least one swapping circuit node of a functional circuit, and repeating the selecting and electrically coupling in successive switching states during operation of the functional circuit for different subsets of the duplicate electronic circuits.

Abstract: An integrated circuit including a functional circuit including at least one swapping circuit node, multiple duplicate electronic circuits, and a switch circuit. The duplicate electronic circuits are integrated in close proximity with each other each including at least one electronic device that is susceptible to RTN. The switch circuit electrically couples a different selected subset of at least one of the duplicate electronic circuits to the at least one swapping circuit node for each of successive switching states during operation of the functional circuit. A method of reducing noise including selecting a subset of the duplicate electronic circuits, electrically coupling the selected duplicate electronic devices to at least one swapping circuit node of a functional circuit, and repeating the selecting and electrically coupling in successive switching states during operation of the functional circuit for different subsets of the duplicate electronic circuits.

Abstract: In an example, an apparatus includes: a pass device coupled between a supply voltage node and a load circuit and to provide a regulated voltage to the load circuit in response to a control signal received at a control terminal of the pass device; a first amplifier to compare a reference voltage to the regulated voltage and to output a comparison signal at a comparison node in response to the comparison; a second amplifier having an input device having a control terminal coupled to the comparison node to receive the comparison signal and to output the control signal to the pass device based at least in part in response to the comparison signal; and a feedback circuit to provide a feedback signal to the first amplifier based at least in part on a load current of the load circuit.

Abstract: In an example, an apparatus includes: a pass device coupled between a supply voltage node and a load circuit and to provide a regulated voltage to the load circuit in response to a control signal received at a control terminal of the pass device; a first amplifier to compare a reference voltage to the regulated voltage and to output a comparison signal at a comparison node in response to the comparison; a second amplifier having an input device having a control terminal coupled to the comparison node to receive the comparison signal and to output the control signal to the pass device based at least in part in response to the comparison signal; and a feedback circuit to provide a feedback signal to the first amplifier based at least in part on a load current of the load circuit.

Abstract: An apparatus includes a digital battery charger. The digital battery charger includes an analog-to-digital converter (ADC) to convert a terminal voltage of a battery to a first digital signal. The digital battery charger further includes a digital controller coupled to the ADC to receive the first digital signal and provide a set of control signals. The digital battery charger further includes a current digital-to-analog converter (IDAC) coupled to the digital controller to receive the set of control signals and to provide a battery charging current signal.

Abstract: An apparatus includes a digital battery charger. The digital battery charger includes an analog-to-digital converter (ADC) to convert a terminal voltage of a battery to a first digital signal. The digital battery charger further includes a digital controller coupled to the ADC to receive the first digital signal and provide a set of control signals. The digital battery charger further includes a current digital-to-analog converter (IDAC) coupled to the digital controller to receive the set of control signals and to provide a battery charging current signal.

Abstract: Imaging systems may be provided with image sensors having verification circuitry. Verification circuitry may be configured to continuously or occasionally verify that the image sensor is functioning properly. For example, verification circuitry may be configured to monitor levels of leakage current during standby mode. Verification circuitry may be coupled between a power supply and circuitry that is powered by that power supply. When the imaging system is in standby mode, circuitry associated with the imaging system such as pixel circuitry may draw a standby leakage current. Verification circuitry may be configured to measure the amount of standby leakage current drawn by associated imaging system circuitry. If the measured level of standby leakage current exceeds a maximum acceptable level of standby leakage current, a warning signal may be generated. Standby leakage current levels on multiple power supply lines may be monitored with associated verification circuitry.

Abstract: A read channel of a magnetic data storage device includes a filter to provide equalization of the signal being detected from the magnetic media. The filter utilizes coefficients for the filter response. The filter coefficients may drift sideways over time. The drift is detected and a correction is implemented by imposing a leakage on the coefficients to re-center the filter response. The leakage sign differs depending on the direction of drift detected.

Abstract: An electronic device may have an image sensor for capturing digital image data of a scene. The image sensor may have an array of image sensor pixels. The image sensor pixels may have photosensitive elements for capturing image data signals. The image data signal from each photosensitive element may be conveyed to an output line associated with a column of the array using a source-follower transistor. The source-follower transistors may be provided with a current bias using current source coupled to each output line. The current source may include a configurable current source transistor that has multiple branches that can be selectively switched into use to adjust transconductance and drain saturation voltage characteristics for the current source. Gate structures in the configurable current source transistor may be supplied with a reference voltage from an adjustable voltage reference circuit.

Abstract: A comparator including a preamplifier amplifying a first signal and a second signal to produce a first amplified signal on a first output terminal and a second amplified signal on a second output terminal. The comparator also includes a capacitor, a clamp and a latch coupled in parallel to the first output terminal and the second output terminal of the preamplifier. A control circuit is coupled to the variable capacitor and the clamp and is configured to close the clamp during a first time period to cause the first amplified signal and the second amplified signal to bypass the capacitor and the latch, and open the clamp during a second time period following the first time period to cause the first amplified signal and the second amplified signal to be coupled to the capacitor and the latch. The capacitor filters the amplified signals, and the latch produces a digital output signal of the comparator based on the filtered signals.

Abstract: A comparator including a preamplifier amplifying a first signal and a second signal to produce a first amplified signal on a first output terminal and a second amplified signal on a second output terminal. The comparator also includes a capacitor, a clamp and a latch coupled in parallel to the first output terminal and the second output terminal of the preamplifier. A control circuit is coupled to the variable capacitor and the clamp and is configured to close the clamp during a first time period to cause the first amplified signal and the second amplified signal to bypass the capacitor and the latch, and open the clamp during a second time period following the first time period to cause the first amplified signal and the second amplified signal to be coupled to the capacitor and the latch. The capacitor filters the amplified signals, and the latch produces a digital output signal of the comparator based on the filtered signals.

Abstract: A read channel of a magnetic recording apparatus includes a filter that uses filter coefficients to process the data detected by a read head from the magnetic recordable media. The coefficients change with time and circumstances. When data is read and found to pass error detection, the filter coefficient set used for the data is stored in a memory as a last good coefficient set. Upon failure of the filtering process, the coefficient set used is replaced with a coefficient set stored in the memory as the last good coefficient set.

Abstract: Imaging systems may be provided with image sensors having verification circuitry. Verification circuitry may be configured to continuously or occasionally verify that the image sensor is functioning properly. For example, verification circuitry may be configured to monitor levels of leakage current during standby mode. Verification circuitry may be coupled between a power supply and circuitry that is powered by that power supply. When the imaging system is in standby mode, circuitry associated with the imaging system such as pixel circuitry may draw a standby leakage current. Verification circuitry may be configured to measure the amount of standby leakage current drawn by associated imaging system circuitry. If the measured level of standby leakage current exceeds a maximum acceptable level of standby leakage current, a warning signal may be generated. Standby leakage current levels on multiple power supply lines may be monitored with associated verification circuitry.

Abstract: An electronic device may have an image sensor for capturing digital image data of a scene. The image sensor may have an array of image sensor pixels. The image sensor pixels may have photosensitive elements for capturing image data signals. The image data signal from each photosensitive element may be conveyed to an output line associated with a column of the array using a source-follower transistor. The source-follower transistors may be provided with a current bias using current source coupled to each output line. The current source may include a configurable current source transistor that has multiple branches that can be selectively switched into use to adjust transconductance and drain saturation voltage characteristics for the current source. Gate structures in the configurable current source transistor may be supplied with a reference voltage from an adjustable voltage reference circuit.

Abstract: A magnetic recording device write channel includes a write equalization encoder for generating a write equalization level signal and a digital to analog converter for converting the write data signal to analog signals for recording. The write equalization level signal from the write equalization encoding device controls an impedance value at an output of said digital-to-analog converter. The output of the digital-to-analog converter is connected to an input of the data transmission line which transmits the write data signal to a write head of the magnetic recording device. Variation in the output impedance of the digital-to-analog converter by comparison to the input impedance of the transmission line controls the level of the equalization transmitted to the write head of the magnetic recording device.

Abstract: A read channel of a magnetic data storage device includes a filter to provide equalization of the signal being detected from the magnetic media. The filter utilizes coefficients for the filter response. The filter coefficients may drift sideways over time. The drift is detected and a correction is implemented by imposing a leakage on the coefficients to re-center the filter response. The leakage sign differs depending on the direction of drift detected.