Patents by Inventor Stephan Kronseder

Stephan Kronseder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuitry, chip, method for testing a memory device, method for manufacturing an integrated circuit and method for manufacturing a chip
    Patent number: 8873304
    Abstract: In various embodiments an integrated circuit or chip is provided, the integrated circuit including a memory device including a plurality of memory cells, and with the memory cells being configured to store a data content, and a controller being configured to write a predefined data pattern in the memory cells of the memory device, reading the data content of the memory cells, mapping each read data content which corresponds to an expected data content depending on the predefined data pattern to a predefined instruction for the controller, with the predefined instruction causing the controller to carry out a predefined action which is representative for the accurate operation of the memory cells, determining that the memory device operates accurately, if the controller carries out the predefined action, and determining that the memory device does not operate accurately, if the controller does not carry out the predefined action.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: October 28, 2014
    Assignee: Infineon Technologies AG
    Inventor: Stephan Kronseder
  • INTEGRATED CIRCUITRY, CHIP, METHOD FOR TESTING A MEMORY DEVICE, METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING A CHIP
    Publication number: 20140085994
    Abstract: In various embodiments an integrated circuit or chip is provided, the integrated circuit including a memory device including a plurality of memory cells, and with the memory cells being configured to store a data content, and a controller being configured to write a predefined data pattern in the memory cells of the memory device, reading the data content of the memory cells, mapping each read data content which corresponds to an expected data content depending on the predefined data pattern to a predefined instruction for the controller, with the predefined instruction causing the controller to carry out a predefined action which is representative for the accurate operation of the memory cells, determining that the memory device operates accurately, if the controller carries out the predefined action, and determining that the memory device does not operate accurately, if the controller does not carry out the predefined action.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 27, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Stephan Kronseder
  • Master nodes and slave nodes for a communication network, and methods thereof
    Patent number: 8099469
    Abstract: Illustrative methods, apparatuses and software are described for searching for an ID of a slave node within a communication network, such as a single-wire communication network. Also, illustrative embodiments of a master node and a slave node are described.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Furtner, Stephan Kronseder, Debin Li, Jason Sen Qian
  • Master Nodes and Slave Nodes for a Communication Network, and Methods Thereof
    Publication number: 20100131610
    Abstract: Illustrative methods, apparatuses and software are described for searching for an ID of a slave node within a communication network, such as a single-wire communication network. Also, illustrative embodiments of a master node and a slave node are described.
    Type: Application
    Filed: November 25, 2009
    Publication date: May 27, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Wolfgang Furtner, Stephan Kronseder, Debin Li, Jason Sen Qian