Patents by Inventor Stephan Voss

Stephan Voss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10177230
    Abstract: A semiconductor device includes a first semiconductor region including a first semiconductor material and a second semiconductor region adjoining the first semiconductor region, the second semiconductor region including a second semiconductor material different from the first semiconductor material. The semiconductor device further includes at least one of a drift zone and a base zone in the first semiconductor region, and at least one type of deep-level dopant in an emitter region of the second semiconductor region. The at least one type of deep-level dopant has a distance to the valence or conduction band of at least 100 meV.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: January 8, 2019
    Assignee: Infineon Technologies AG
    Inventors: Stephan Voss, Franz-Josef Niedernostheide, Hans-Joachim Schulze
  • Patent number: 10153339
    Abstract: A semiconductor device includes a common doping region located within a semiconductor substrate of the semiconductor device. The common doping region includes a first portion. A maximal doping concentration within the first portion is higher than 1·1015 cm?3. The common doping region includes a second portion. A minimal doping concentration within the second portion is lower than 50% of the maximal doping concentration within the first portion of the common doping region. The common doping region includes a third portion. A minimal doping concentration within the third portion is more than 30% higher than the minimal doping concentration within the second portion. The second portion of the common doping region is located vertically between the first portion of the common doping region and the third portion of the common doping region.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: December 11, 2018
    Assignee: Infineon Technologies AG
    Inventors: Stephan Voss, Alexander Breymesser, Hans-Joachim Schulze, Yvonne Gawlina-Schmidl
  • Patent number: 10143450
    Abstract: A biopsy device includes a tubular member, a hollow shaft and an elongated fiber body having at least one optical fiber. The hollow shaft has a laterally (sidewardly) facing notch in its distal portion. The tubular member is movable relative to the shaft, between a first position in which the notch is covered by the tubular member, and a second position in which the notch is not covered by the tubular member. The shaft is movable between a first position in which the distal end of the optical fiber is located at the distal end of the shaft with the elongated fiber body extending through the notch, and a second position in which the distal end of the at least one optical fiber is located proximally to the notch.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: December 4, 2018
    Assignee: Koninklijke Philips N.V.
    Inventors: Waltherus Cornelis Jozef Bierhoff, Christian Reich, Martinus Bernardus Van Der Mark, Bernardus Hendrikus Wilhelmus Hendriks, Anja Van De Stolpe, Stephan Voss, Axel Winkel, Marjolen Van Der Voort, Vishnu Vardhan Pully, Gerhardus Wilhelmus Lucassen, Susanne Dorien Van Den Berg-Dams, Jarich Willem Spliethoff
  • Publication number: 20180303468
    Abstract: A biopsy device is provided comprising a tubular member, a hollow shaft and an elongated fiber body. The hollow shaft may have a distal end and a shaft, wherein a laterally (sidewardly) facing notch is formed in the distal portion of the shaft. The elongated fiber body may include at least one optical fiber, preferably at least two optical fibers, with a distal end. The tubular member is movable relative to the shaft, between a first position in which the notch is covered by the tubular member, and a second position in which the notch is not covered by the tubular member. The fiber body is movable within the shaft, between a first position in which the distal end of the optical fiber is located at the distal end of the shaft with the elongated fiber body extending through the notch, and a second position in which the distal end of the at least one optical fiber is located proximally to the notch.
    Type: Application
    Filed: June 26, 2018
    Publication date: October 25, 2018
    Inventors: Waltherus Cornelis Jozef Bierhoff, Christian Reich, Martinus Bernardus Van Der Mark, Bernardus Hendrikus Wilhelmus Hendriks, Anja Van De Stolpe, Stephan Voss, Axel Winkel, Marjolen Van Der Voort, Vishnu Vardhan Pully, Gerhardus Wilhelmus Lucassen, Susanne Dorien Van Den Berg-Dams, Jarich Willem Spliethoff
  • Patent number: 10038052
    Abstract: A vertical semiconductor device comprises a substrate having a front surface and a back surface, an active area (AA) located in the substrate, having a drift region doped with a first dopant type, an edge termination region (ER) laterally surrounding the active area (AA), a channelstopper terminal provided at the front surface and located in the edge termination region (ER), and a first suppression trench located on a side of the channelstopper terminal towards the active region (AA), and provided adjacent to the channelstopper terminal. Further, a production method for such a semiconductor device is provided.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: July 31, 2018
    Assignee: Infineon Technologies AG
    Inventors: Elmar Falck, Frank Dieter Pfirsch, Hans-Joachim Schulze, Stephan Voss
  • Publication number: 20180190641
    Abstract: Semiconductor device is provided with a semiconductor body that includes a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the first pn junction diode is greater than 100 V, and a breakdown voltage of the second pn junction diode is greater than 10 V.
    Type: Application
    Filed: February 28, 2018
    Publication date: July 5, 2018
    Inventors: Stephan Voss, Roman Baburske, Thomas Basler, Thomas Kimmer, Hans-Joachim Schulze
  • Publication number: 20180158937
    Abstract: A superjunction bipolar transistor includes an active transistor cell area that includes active transistor cells electrically connected to a first load electrode at a front side of a semiconductor body. A superjunction area overlaps the active transistor cell area and includes a low-resistive region and a reservoir region outside of the low-resistive region. The low-resistive region includes a first superjunction structure with a first vertical extension with respect to a first surface at the front side of the semiconductor body. The reservoir region includes no superjunction structure such that the reservoir region includes the semiconductor body that extends from a region located at the first surface to a drain region.
    Type: Application
    Filed: December 28, 2017
    Publication date: June 7, 2018
    Applicant: Infineon Technologies AG
    Inventors: Frank Dieter PFIRSCH, Franz-Josef NIEDERNOSTHEIDE, Hans-Joachim SCHULZE, Stephan VOSS
  • Patent number: 9985017
    Abstract: Semiconductor device with a semiconductor body that includes a clamping structure including a pn junction diode and a Schottky junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the pn junction diode is greater than 100 V and a breakdown voltage of the Schottky junction diode is greater than 10 V.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 29, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Stephan Voss, Roman Baburske, Thomas Basler, Thomas Kimmer, Hans-Joachim Schulze
  • Patent number: 9979187
    Abstract: An example power device includes a semiconductor chip and an arrester element configurable to, in response to a voltage across the arrester element being greater than a threshold voltage, create a current path around an isolation layer configured to electrically isolate the semiconductor chip from a heat sink configured to dissipate heat generated by the semiconductor chip. In this example power device, the threshold voltage is less than a breakdown voltage of the isolation layer.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: May 22, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Basler, Edward Fuergut, Stephan Voss
  • Publication number: 20180090565
    Abstract: A semiconductor device includes a common doping region located within a semiconductor substrate of the semiconductor device. The common doping region includes a first portion. A maximal doping concentration within the first portion is higher than 1·1015 cm?3. The common doping region includes a second portion. A minimal doping concentration within the second portion is lower than 50% of the maximal doping concentration within the first portion of the common doping region. The common doping region includes a third portion. A minimal doping concentration within the third portion is more than 30% higher than the minimal doping concentration within the second portion. The second portion of the common doping region is located vertically between the first portion of the common doping region and the third portion of the common doping region.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 29, 2018
    Inventors: Stephan Voss, Alexander Breymesser, Hans-Joachim Schulze, Yvonne Gawlina-Schmidl
  • Patent number: 9917181
    Abstract: A superjunction bipolar transistor includes an active transistor cell area that includes active transistor cells electrically connected to a first load electrode at a front side of a semiconductor body. A superjunction area overlaps the active transistor cell area and includes a low-resistive region and a reservoir region outside of the low-resistive region. The low-resistive region includes a first superjunction structure with a first vertical extension with respect to a first surface of the semiconductor body. The reservoir region includes no superjunction structure or a second superjunction structure with a mean second vertical extension smaller than the first vertical extension.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: March 13, 2018
    Assignee: Infineon Technologies AG
    Inventors: Frank Dieter Pfirsch, Franz-Josef Niedernostheide, Hans-Joachim Schulze, Stephan Voss
  • Patent number: 9899377
    Abstract: A semiconductor device and a method for producing thereof is provided. The semiconductor device includes a plurality of device cells, each comprising a body region, a source region, and a gate electrode adjacent to the body region and dielectrically insulated from the body region by a gate dielectric; and an electrically conductive gate layer comprising the gate electrodes or electrically connected to the gate electrodes of the plurality of device cells. The gate layer is electrically connected to a gate conductor and includes at least one of an increased resistance region and a decreased resistance region.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: February 20, 2018
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Franz-Josef Niedernostheide, Frank Dieter Pfirsch, Francisco Javier Santos Rodriguez, Stephan Voss, Wolfgang Wagner
  • Patent number: 9865717
    Abstract: A semiconductor device includes transistor cells formed inside a semiconductor body. First and second semiconductor well regions have second conductivity type dopants and are arranged external of the transistor cells. The first semiconductor well region is arranged between two transistor cells and the second semiconductor well region is electrically connected with a load contact. A separation region has first conductivity type dopants and extends from a surface of the semiconductor body along the vertical direction and is arranged between and in contact with each of the first and second semiconductor well regions. The first semiconductor well region extends at least as deep as each of body regions of two transistor cells. A transition in a first lateral direction between the separation and first semiconductor well regions extends continuously from the surface to a point in the semiconductor body at least as deep as each body region of two transistor cells.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: January 9, 2018
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Stephan Voss, Frank Dieter Pfirsch
  • Patent number: 9854961
    Abstract: The present invention relates to a medical needle which comprises an elongate tube and at least one optical fiber, e.g. two fibers, arranged within the elongate tube, for making optical measurements at the distal end of the needle. The optical fibers(s) has a beveled distal end surface, wherein a plane touching the beveled distal end surface and a longitudinal extension axis of the optical fiber forms a bevel angle which is 30°-35°. Such needle is advantageous for providing a medical needle which is reliable and long term stable, can be manufactured in low cost using known optical fiber materials, thus allowing it to form part of disposable medical kits. Still, the bevel angle of 30°-35° provides a needle which is easy to insert and which provides a low tendency to cause tissue sticking. Especially, the elongate tube and the optical fiber end(s) have the same beveled angle within the range 30°-35°, thus allowing a smooth front surface of the needle.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: January 2, 2018
    Assignee: Koninklijke Philips N.V.
    Inventors: Klaas Cornelis Jan Wijbrans, Gerhardus Wilhelmus Lucassen, Bernardus Hendrikus Wilhelmus Hendriks, Christian Reich, Johannes Antonius Van Rooij, Waltherus Cornelis Jozef Bierhoff, Marjolein Van Der Voort, Axel Winkel, Stephan Voss, Torre Michelle Bydlon
  • Patent number: 9859272
    Abstract: A semiconductor device comprising a source region being electrically connected to a first load terminal (E) of the semiconductor device and a drift region comprising a first semiconductor material (M1) having a first band gap, the drift region having dopants of a first conductivity type and being configured to carry at least a part of a load current between the first load terminal (E) and a second load terminal (C) of the semiconductor device, is presented. The semiconductor device further comprises a semiconductor body region having dopants of a second conductivity type complementary to the first conductivity type and being electrically connected to the first load terminal (E), a transition between the semiconductor body region and the drift region forming a pn-junction, wherein the pn-junction is configured to block a voltage applied between the first load terminal (E) and the second load terminal (C).
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: January 2, 2018
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Holger Huesken, Franz-Josef Niedernostheide, Frank Dieter Pfirsch, Roman Roth, Christian Philipp Sandow, Carsten Schaeffer, Stephan Voss
  • Patent number: 9825023
    Abstract: An embodiment of an IGBT comprises an emitter terminal at a first surface of a semiconductor body. The IGBT further comprises a collector terminal at a second surface of the semiconductor body. A first zone of a first conductivity type is in the semiconductor body between the first and second surfaces. A collector injection structure adjoins the second surface, the collector injection structure being of a second conductivity type and comprising a first part and a second part at a first lateral distance from each other. The IGBT further comprises a negative temperature coefficient thermistor adjoining the first zone in an area between the first and second parts.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: November 21, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Basler, Erich Griebl, Joachim Mahler, Daniel Pedone, Wolfgang Scholz, Philipp Seng, Peter Tuerkes, Stephan Voss
  • Publication number: 20170323719
    Abstract: A winding arrangement for an electric installation has an electric conductor and a plurality of cooling ducts. The electric conductor is coiled up forming several layers around an axis. Each cooling duct extends between a pair of adjacent layers of the coiled electric conductor in axial direction through the winding arrangement and in tangential direction not entirely around the axis. The cooling ducts of the plurality of cooling ducts are distributed among more than one pair of adjacent layers such that the winding arrangement is substantially cylindrical.
    Type: Application
    Filed: October 28, 2015
    Publication date: November 9, 2017
    Inventors: EUGENIO DE SANTIS, JR., JOEL MENDES, ANTONIO PEDRO SILVA, STEPHAN VOSS
  • Patent number: 9809877
    Abstract: An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. A beam track of the ion beam on a substrate mounted on the substrate support includes circles or a spiral.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: November 7, 2017
    Assignee: Infineon Technologies AG
    Inventors: Alexander Breymesser, Stephan Voss, Hans-Joachim Schulze, Werner Schustereder
  • Patent number: 9754787
    Abstract: A Magnetic Czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. The semiconductor wafer is heated in a first thermal process to form radiation induced donors. Implantation energy and dose are chosen such that the semiconductor wafer has, after the first thermal process, an n-doped semiconductor region arranged between the second side and first depth, and the n-doped semiconductor region has, in the first vertical direction, a local maximum of a net doping concentration between the first depth and second side and a local minimum of the net doping concentration between the first depth and first maximum.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: September 5, 2017
    Assignee: Infineon Technologies AG
    Inventors: Johannes Laven, Hans-Joachim Schulze, Stephan Voss, Alexander Breymesser, Alexander Susiti, Shuhai Liu, Helmut Oefner
  • Patent number: 9704712
    Abstract: According to various embodiments, a method may include: structuring a semiconductor region to form a structured surface of the semiconductor region; disposing a dopant in the semiconductor region; and activating the dopant at least partially by irradiating the structured surface at least partially with electromagnetic radiation having at least one discrete wavelength to heat the semiconductor region at least partially.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: July 11, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alexander Breymesser, Stephan Voss