Patents by Inventor Stephane Guedon

Stephane Guedon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9767235
    Abstract: The invention relates to a method and device for thermal simulation of electronic systems involving breaking down the system into parts being in a single material and represented as a detailed model, to form a plurality of detailed models each including at least a mesh, a heat admittance system, a heat transfer interface, a connection interface, a power multi-source interface, and a temperature measurement interface; reducing each of the detailed models into a compact model by controlling the maximum of a heat flow frequency; interpolating nodes of the heat transfer interface, connection interface, power multi-source interface, or temperature measurement interface of at least one of the detailed models and the coupling of at least two of the compact models into a macromodel; and reducing the macromodel to form a compact and flexible thermal model.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Stephane Guedon, Nicolas Peltier, Sylvian Kaiser, Olivier Martins
  • Publication number: 20120116735
    Abstract: The invention relates to a method for thermal simulation of an electronic circuit, including: a) the breaking down of the circuit into components, each represented as a first model including at least one meshing of the component, a matrix of heat conductances and a matrix of heat susceptances, b) the definition of at least one interface area of each model, c) the formation of a reduced model of each model, d) the connection of the reduced models of different components in order to form a reduced model of the circuit, e) the simulation of the thermal behavior of the circuit by means of this reduced model of the circuit.
    Type: Application
    Filed: October 21, 2011
    Publication date: May 10, 2012
    Applicant: DOCEA POWER
    Inventors: Stephane Guedon, Nicolas Peltier, Sylvian Kaiser, Olivier Martins
  • Patent number: 8165861
    Abstract: A simulation method of an electronic circuit or a printed circuit, represented in the form of masks and connections, includes the definition of, on one hand, inputs and outputs of circuit networks, and, on the other, internal components of each network; the formation of a reduced model of each network; and the simulation of the network using this reduced model. In the event of an unsatisfactory simulation result, the modification of one or more networks, the formation of a second reduced model, and the simulation with said new reduced model, are performed. In the event of a satisfactory simulation result, production of the circuit can be undertaken.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: April 24, 2012
    Assignee: S.A. Edxact
    Inventor: Stephane Guedon
  • Publication number: 20080133201
    Abstract: The invention relates to a simulation method of an electronic circuit or a printed circuit, represented in the form of masks and connections, comprising: a) the definition of, on one hand, inputs and outputs of circuit networks, and, on the other, internal components of each network, b) the formation of a reduced model of each network; c) the simulation of the network using this reduced model, d) in the event of an unsatisfactory simulation result, the modification of one or more networks, the formation of a second reduced model, and the simulation with said new reduced model, e) in the event of a satisfactory simulation result, the production of the circuit.
    Type: Application
    Filed: November 3, 2006
    Publication date: June 5, 2008
    Applicant: S.A. EDXACT
    Inventor: Stephane Guedon