Patents by Inventor Stephanie L. Hilbun

Stephanie L. Hilbun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10879387
    Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods therefor, including a multi-fingered transistor structure formed in an active region of a semiconductor substrate, in which a transistor drain finger is centered in a multi-finger transistor structure, a transistor body region laterally surrounds the transistor, an outer drift region laterally surrounds an active region of the semiconductor substrate, and one or more inactive or dummy structures are formed at lateral ends of the transistor finger structures.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: December 29, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Henry Litzmann Edwards, James Robert Todd, Binghua Hu, Xiaoju Wu, Stephanie L. Hilbun
  • Patent number: 10566200
    Abstract: A method to fabricate a transistor comprises: forming a first dielectric layer on a semiconductor substrate; depositing a barrier layer on the first dielectric layer; depositing an anti-reflective coating on the barrier layer; depositing and exposing a pattern in a photoresist layer to radiation followed by etching to provide an opening; etching a portion of the anti-reflective coating below the opening; etching a portion of the barrier layer below the opening to expose a portion of the first dielectric layer; providing an ambient oxidizing agent to grow an oxide region followed by removing the barrier layer; implanting dopants into the semiconductor substrate after removing the barrier layer; removing the first dielectric layer after implanting dopants into the semiconductor substrate; and forming a second dielectric layer after removing the first dielectric layer, wherein the oxide region is grown to be thicker than the second dielectric layer.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: February 18, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abbas Ali, Binghua Hu, Stephanie L. Hilbun, Scott William Jessen, Ronald Chin, Jarvis Benjamin Jacobs
  • Publication number: 20200013890
    Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods therefor, including a multi-fingered transistor structure formed in an active region of a semiconductor substrate, in which a transistor drain finger is centered in a multi-finger transistor structure, a transistor body region laterally surrounds the transistor, an outer drift region laterally surrounds an active region of the semiconductor substrate, and one or more inactive or dummy structures are formed at lateral ends of the transistor finger structures.
    Type: Application
    Filed: September 18, 2019
    Publication date: January 9, 2020
    Inventors: Henry Litzmann Edwards, James Robert Todd, Binghua Hu, Xiaoju Wu, Stephanie L. Hilbun
  • Patent number: 10461182
    Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods therefor, including a multi-fingered transistor structure formed in an active region of a semiconductor substrate, in which a transistor drain finger is centered in a multi-finger transistor structure, a transistor body region laterally surrounds the transistor, an outer drift region laterally surrounds an active region of the semiconductor substrate, and one or more inactive or dummy structures are formed at lateral ends of the transistor finger structures.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 29, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Henry Litzmann Edwards, James Robert Todd, Binghua Hu, Xiaoju Wu, Stephanie L. Hilbun
  • Publication number: 20190304786
    Abstract: A method to fabricate a transistor comprises: forming a first dielectric layer on a semiconductor substrate; depositing a barrier layer on the first dielectric layer; depositing an anti-reflective coating on the barrier layer; depositing and exposing a pattern in a photoresist layer to radiation followed by etching to provide an opening; etching a portion of the anti-reflective coating below the opening; etching a portion of the barrier layer below the opening to expose a portion of the first dielectric layer; providing an ambient oxidizing agent to grow an oxide region followed by removing the barrier layer; implanting dopants into the semiconductor substrate after removing the barrier layer; removing the first dielectric layer after implanting dopants into the semiconductor substrate; and forming a second dielectric layer after removing the first dielectric layer, wherein the oxide region is grown to be thicker than the second dielectric layer.
    Type: Application
    Filed: April 3, 2018
    Publication date: October 3, 2019
    Inventors: Abbas ALI, Binghua HU, Stephanie L. HILBUN, Scott William JESSEN, Ronald CHIN, Jarvis Benjamin JACOBS
  • Patent number: 6631299
    Abstract: A tuned run-to-run controlled system is disclosed that provides tuned run-to-run control of a system. The system includes a controlled system coupled to a tuned run-to-run controller, which contains a feedback controller coupled to a tuner. Tuned run-to-run controller determines a feedback command based on a nominal gain, a maximum gain, a process error, and a tuning gain.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: October 7, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Nital S. Patel, Steven T. Jenkins, Clifton E. Brooks, Stephanie L. Hilbun