Patents by Inventor Stephanie P. Payne

Stephanie P. Payne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System for reformatting a response packet with speed code from a source packet using DMA engine to retrieve count field and address from source packet
    Patent number: 5632016
    Abstract: A high performance serial bus operating at multiple transmission rates is disclosed. The serial bus is able to automatically generate data response packets for return to a requesting node. The automatic packet generation uses the source and destination information to generate a return destination packet for directing the requested data to the request source destination. Since the bus network is capable of operating at several different transmission rates, the speed at which the data request packet was transmitted is used for retransmitting the data requested back to the source node requesting the data.
    Type: Grant
    Filed: September 27, 1994
    Date of Patent: May 20, 1997
    Assignee: International Business Machines Corporation
    Inventors: Gary B. Hoch, Timothy V. Lee, Rex E. McCrary, Stephanie P. Payne, Daniel Petkevich, Hai V. Pham
  • Method and system for dynamically appending a data block to a variable length transmit list while transmitting another data block over a serial bus
    Patent number: 5619646
    Abstract: A computer system allows for a hardware structure to participate in the transmission of P1394 packets, which are comprised of command or data blocks from linked list structures in a system memory, is disclosed. The system is able to provide dynamic appending of these command or data blocks to the link list while they are being operated upon. This provides an efficient transaction layer operation, which minimizes signalling between the link list operator or control code, and other hardware features.
    Type: Grant
    Filed: September 27, 1994
    Date of Patent: April 8, 1997
    Assignee: International Business Machines Corporation
    Inventors: Gary B. Hoch, Timothy V. Lee, Rex E. McCrary, Stephanie P. Payne, Daniel Petkevich, Hai V. Pham
  • Digital I/O bus controller circuit with auto-incrementing, auto-decrementing and non-incrementing/decrementing access data ports
    Patent number: 5524267
    Abstract: A digital bus circuit having an Address/Data port select decoder 170 in circuit communication with a Selector 194, a Data Port Buffer/Register 181, and an Address Port register 208. The Selector 194 is in circuit communication with an auto incrementor 216, an auto decrementor 218, and a polling function. The incrementor 216 serves to automatically increment an address present in the Address port register 208. The decrementor 218 serves to automatically decrement an address present in the Address port register 208. The polling function serves to reload the Address port register 208 with the same address. The present invention allows a number of enhanced programming methods which permit input and output operations to be implemented with fewer program code instructions. One of the programming methods disclosed by the present invention is an enhanced method of "polling" a device's internal register by accessing the polling function.
    Type: Grant
    Filed: March 31, 1994
    Date of Patent: June 4, 1996
    Assignee: International Business Machines Corporation
    Inventors: Arthur L. Chin, Serafin J. E. Garcia, Jr., Don S. Keener, Gregory J. Moore, Stephanie P. Payne, Eric S. Stine