Abstract: A method for improving the operating stability of compound semiconductor minority carrier devices and the devices created using this method are described. The method describes intentional introduction of impurities into the layers adjacent to the active region, which impurities act as a barrier to the degradation process, particularly undesired defect formation and propagation. A preferred embodiment of the present invention uses O doping of III-V optoelectronic devices during an epitaxial growth process to improve the operating reliability of the devices.

Abstract: Methods for the fabrication of TS LED chips with improved light extraction and optics, particularly increased top surface emission, and the TS LEDs so fabricated are described. Non-absorbing DBRs within the chip permit the fabrication of the LEDs. The transparent DBRs redirect light away from absorbing regions such as contacts within the chip, increasing the light extraction efficiency of the LED. The non-absorbing DBRs can also redirect light toward the top surface of the chip, improving the amount of top surface emission and the on-axis intensity of the packaged LED. These benefits are accomplished with optically non-absorbing layers, maintaining the advantages of a TS LED, which advantages include .about.6 light escape cones, and improved multiple pass light extraction.

Abstract: A process for growing semi-insulating layers of indium phosphide and other group III-V materials through the use of halide dopant or etchant introduction during growth. Gas phase epitaxial growth techniques are utilized at low temperatures to produce indium phosphide layers having a resistivity greater than approximately 10.sup.7 ohm-cm. According to the preferred embodiment carbon tetrachloride is used as a dopant at flow rates above 5 sccm to grow the layers with substrate growth temperatures ranging from approximately 460.degree. C. to 525.degree. C. This temperature range provides an advantage over the transition metal techniques for doping indium phosphide since the high temperatures generally required for those techniques limit the ability to control growth. Good surface morphology is also obtained through the growth according to the present invention. The process may be used to form many types of group III-V semiconductor devices.