Patents by Inventor Stephen D. MacArthur

Stephen D. MacArthur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7853716
    Abstract: A data storage system having a packet switching network, a cache memory, and a plurality of directors, one portion of such directors being adapted for coupling to a host computer/server and another portion of the directors being adapted for coupling to a bank of disk drives. The plurality of directors and cache memory are interconnected through the packet switching network. Each one of the directors is adapted to transmit different types of information packets to another one of the directors through the network. Each one of the directors is adapted to transmit and receive different types of information packets to another one of the directors or cache memories through the packet switching network. Each one of the cache memories is adapted to receive and transmit different types of information packets to one of the directors through the packet switching network. One type of information packet requires a different degree of latency than another type of information packet.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: December 14, 2010
    Assignee: EMC Corporation
    Inventors: William F. Baxter, III, Stephen D. MacArthur, Man Min Moy, Brett D. Niver, Yechiel Yochai
  • Patent number: 7818447
    Abstract: Described is an end-to-end broadcast-based messaging technique used in controlling message flow in a data storage system. Each node stores flow control state information about all the nodes which is used in determining whether to send a data transmission to a receiving node. The flow control state information includes an indicator as to whether each node is receiving incoming data transmissions. If a node is not receiving incoming data transmissions, the flow control state information also includes an associated expiration time. Data transmissions are resumed to a receiving node based on the earlier of a sending node determining that the expiration time has lapsed, or receiving a control message from the receiving node explicitly turning on data transmissions. Each node maintains and updates its local copy of the flow control state information in accordance with control messages sent by each node to turn on and off data transmissions.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: October 19, 2010
    Assignee: EMC Corporation
    Inventors: Brett D. Niver, Steven R. Chalmer, Steven T. McClure, Stephen D. MacArthur, Avinash Kallat
  • Patent number: 7729239
    Abstract: An end point controller includes two of ingress/egress port pairs. A first one of the ingress/egress ports is adapted to send and receive one of a pair of types of information packets and a second one of the ingress/egress ports is adapted to send and receive the other one of the pair of types of information packets. A controller is coupled to the two port pairs for coupling one of ingress/egress ports to an input/output port selectively in accordance with the type of the information packet on the ingress/egress ports and the availability of the end point controller to a network. One of the egress ports is directly coupled to the output port to the network if the information packet is at such port and the end point controller has been granted access to the network while other information at the pair of egress ports is buffered prior to being coupled to the output.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: June 1, 2010
    Assignee: EMC Corporation
    Inventors: Alexander Y. Aronov, Stephen D. MacArthur, Michael Sgrosso, William F. Baxter, III
  • Patent number: 7672303
    Abstract: A method is provided for performing arbitration in an information packet controller. The method includes transmitting different types of information packets from an initiator to a receiver. One type of information packet has a quality of service requiring a faster transmission time from the initiator to the receiver than another type of information packet having a quality of service having a slower transmission time from the initiator to the receiver. The transmitting of the information packets from the initiator to the receiver is in accordance with priority assigned to the information packet, the quality of service assigned to the information packet, and the age of such information packets having been stored in a queue of the initiator, such quality of service being a function of the speed at which the packets are required to pass from the initiator to a receiver.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: March 2, 2010
    Assignee: EMC Corporation
    Inventors: William F. Baxter, III, Stephen D. MacArthur, Man Min Moy, Brett D. Niver, Yechiel Yochai
  • Patent number: 7117275
    Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: October 3, 2006
    Assignee: EMC Corporation
    Inventors: Yuval Ofek, David L. Black, Stephen D. Macarthur, Richard Wheeler, Robert Thibault
  • Patent number: 7102893
    Abstract: An assembly couples first and second backplanes together. The first backplane is configured to carry first electrical backplane signals among a first set of circuit boards. The second backplane is configured to carry second electrical backplane signals among a second set of circuit boards. The assembly includes a first switch configured to convey at least some of the first electrical backplane signals between circuit boards of the first set of circuit boards. The assembly further includes a second switch configured to convey at least some of the second electrical backplane signals between circuit boards of the second set of circuit boards. The assembly further includes a fiber optic cable joining the first and second switches together. The first and second switches are configured to exchange fiber optic signals through the fiber optic cable thus forming a cohesive backplane interconnect system between the first and second sets of circuit boards.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: September 5, 2006
    Assignee: EMC Corporation
    Inventors: Stephen D. MacArthur, Rudy Bauer, William Frederick Baxter, III, Paul C. Wilson
  • Patent number: 7073020
    Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 4, 2006
    Assignee: EMC Corporation
    Inventors: David L. Black, Stephen D. MacArthur, Richard G. Wheeler, Robert A. Thibault, Michael Shulman
  • Patent number: 7010575
    Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: March 7, 2006
    Assignee: EMC Corporation
    Inventors: Stephen D. MacArthur, David Black, Richard Wheeler
  • Patent number: 7003601
    Abstract: A system interface having a plurality of first directors and a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports. A plurality of second director boards is provided. Each one of the second directors boards has a plurality of second directors a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports. A data transfer section is provided having a cache memory. The cache memory is coupled to the plurality of first and second directors. A message network is provided, such network being operative independently of the data transfer section.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: February 21, 2006
    Assignee: EMC Corporation
    Inventor: Stephen D. MacArthur
  • Patent number: 6993621
    Abstract: A system interface includes a plurality of first director boards. Each one of the first director boards has a plurality of first directors and a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports. The system interface also includes a plurality of second director boards. Each one of the second directors boards has a plurality of second directors and a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports. A data transfer section is provided having a cache memory. The cache memory is coupled to the plurality of first and second directors. A message network is operative independently of the data transfer section. The message network includes a pair of message network boards. Each one of such message network boards has a switching network having a plurality input/output ports.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: January 31, 2006
    Assignee: EMC Corporation
    Inventors: David L. Black, Richard Wheeler, Robert Thibault, Stephen D. MacArthur, Yuval Ofek
  • Patent number: 6868479
    Abstract: A data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The system interface includes: a plurality of first directors coupled to the host computer/server; a plurality of second directors coupled to the bank of disk drives; a cache memory; and a data transfer section coupled to the plurality of first directors, the second directors, and the cache memory. A messaging network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the host computer and the bank of disk drives in response to messages passing between the directors through the messaging network as such data passes through the memory via the data transfer section. A service processing network is provided for interfacing a plurality of service processing units to the plurality of first and second directors through a plurality of redundant communication channels.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: March 15, 2005
    Assignee: EMC Corporation
    Inventors: Robert A. Thibault, Stephen D. MacArthur, Brian Gallagher, Brian Marchionni
  • Patent number: 6779071
    Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: August 17, 2004
    Assignee: EMC Corporation
    Inventors: Avinash Kallat, Robert Thibault, Stephen D. MacArthur
  • Patent number: 6529521
    Abstract: A controller for providing buffering between a data source/destination and a network. The network is coupled to the controller through an Ethernet bus. The controller includes an Ethernet MAC Core coupled to the Ethernet bus. A buffer is disposed between the MAC Core and the data source/destination for storing data/control frames. Each frame has an Ethernet data portion and an Ethernet MAC Core control signal portion to reduce central processing unit overhead in processing transmission and reception of Ethernet frame data. A control section enables the frames to pass between the source/destination and the network through the MAC Core under control of the buffer stored Core control signals portion of the frame.
    Type: Grant
    Filed: December 27, 1999
    Date of Patent: March 4, 2003
    Assignee: EMC Corporation
    Inventor: Stephen D. MacArthur