Patents by Inventor Stephen D. Panshin

Stephen D. Panshin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230376703
    Abstract: In some examples, an electronic device includes a network interface and a controller. The controller receives, via the network interface, an identifier of a radio frequency identification (RFID) tag, and generates a notification in response to the identifier being different from a set of identifiers stored to a storage device. The set of identifiers includes multiple identifiers associated with the RFID tag.
    Type: Application
    Filed: May 23, 2022
    Publication date: November 23, 2023
    Inventors: Jefferson P. WARD, Stephen D. PANSHIN, Marina FERRAN FARRES
  • Patent number: 11783023
    Abstract: An example print supply includes a non-transitory computer-readable medium. The non-transitory computer-readable medium includes data. The data includes an indication of a schema for the data. The data also includes an indication of an identifier. The data includes an indication of a digital signature. The digital signature is usable to authenticate a type of the data, the schema, and the identifier. The print supply also includes a communication interface. The communication interface is to output the data from the non-transitory computer-readable medium.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: October 10, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shell S. Simpson, Jefferson P. Ward, Stephen D. Panshin, David B. Novak
  • Patent number: 11738562
    Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: August 29, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Scott A. Linn, Stephen D. Panshin, Jefferson P. Ward, David Owen Roethig, David N. Olsen, Anthony D. Studer, Michael W. Cumbie, Sirena Chi Lu
  • Patent number: 11691429
    Abstract: In an example implementation, a print supply cartridge comprises a microcontroller to receive a timing challenge and enable authentication of the cartridge by providing a challenge response. The challenge response is provided in a challenge response time that falls within an expected time window.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: July 4, 2023
    Assignee: Hewlett-Packard Development Company L.P.
    Inventors: Jefferson P. Ward, Stephen D. Panshin
  • Patent number: 11625493
    Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: April 11, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Scott A. Linn, Stephen D. Panshin, Jefferson P. Ward, David Owen Roethig
  • Publication number: 20230109232
    Abstract: A logic circuitry package for a print apparatus includes a serial data bus interface to interface with a serial data bus, the logic circuit to respond to messages from the print apparatus over the serial data bus directed to a number of different addresses using different component keys for cryptographic authentication corresponding to each different address, the different component keys related to at least one master key of the print apparatus. The logic circuitry package further includes control logic which, in response to a session initiation request message on the serial data bus from the print apparatus, is to establish a secure communication session related to one of the different addresses, the control logic to cryptographically authenticate responses to each subsequent message of the secure communication session from the print apparatus using a component key corresponding to the address.
    Type: Application
    Filed: April 20, 2020
    Publication date: April 6, 2023
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Jefferson P. Ward, Stephen D, Panshin, Kyle Michel
  • Patent number: 11513992
    Abstract: An example replaceable print material supply cartridge that is removably couplable to a host printer is disclosed. The example replaceable print material supply cartridge includes an ink reservoir and a logic circuitry package. The logic circuitry package includes logic circuitry and a serial data bus interface, wherein the serial data bus interface is to interface with a serial data bus of the host printer. In response to a first command sent to the logic circuitry package via the serial data bus connected to the serial data bus interface, the first command including a time period, the logic circuitry is to cause generation of a low voltage condition on the serial data bus for a duration based on the time period, and, after the duration, cause a return to a default voltage condition on the serial data bus.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: November 29, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Scott A. Linn
  • Patent number: 11513993
    Abstract: Replaceable print material supply cartridges for printers are disclosed herein. An example replaceable print material supply cartridge includes logic circuitry that is to determine a position of the replaceable print material supply cartridge by initiating a first voltage on a data contact during a time period, monitoring a timer without reference to a clock signal at a clock contact from a serial data bus, and maintaining a first voltage on the data contact for a duration of time. After expiration of the duration, the logic circuitry is to cause the data contact to assume a second voltage, different than the first voltage, and the logic circuitry is to read data from the memory and cause transmission of a data signal via the serial data bus interface.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: November 29, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Scott A. Linn
  • Publication number: 20220348022
    Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 3, 2022
    Inventors: James Michael GARDNER, Scott A. LINN, Stephen D. PANSHIN, Jefferson P. WARD, David Owen ROETHIG, David N. OLSEN, Anthony D. STUDER, Michael W. CUMBIE, Sirena Chi LU
  • Patent number: 11479046
    Abstract: In an example, a method includes, by logic circuitry associated with a replaceable print apparatus component installed in a print apparatus, responding to a sensor data request received from the print apparatus by returning a first response; receiving a calibration parameter from the print apparatus; and returning a second response which is different from the first response.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: October 25, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Sirena Chi Lu, Scott A. Linn, Stephen D. Panshin, David Owen Roethig, David N. Olsen, Anthony D. Studer, Michael W. Cumbie, Jefferson P. Ward
  • Patent number: 11479048
    Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface and at least one logic circuit. The at least one logic circuit is configured to respond to communications sent to a first address via the interface and respond to communications sent to a second address via the interface. The at least one logic circuit is configured to in response to a hibernate command sent to the first address, respond to communications sent to the second address.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: October 25, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, David Owen Roethig, James Michael Gardner
  • Patent number: 11427010
    Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: August 30, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Scott A. Linn, Stephen D. Panshin, Jefferson P. Ward, David Owen Roethig, David N. Olsen, Anthony D. Studer, Michael W. Cumbie, Sirena Chi Lu
  • Patent number: 11429554
    Abstract: In an example, a logic circuitry package has a first address and comprises a first logic circuit. In some examples, the first address is an I2C address for the first logic circuit, and the package is configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the first logic circuit is to, for a duration of the time period, perform a task, and disregard I2C traffic sent to the first address.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 30, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Jefferson P. Ward, Scott A. Linn, James Michael Gardner
  • Patent number: 11407229
    Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit, and a logic circuit having a communication address to communicate with the print apparatus logic circuit. The logic circuit is configured to detect, via the interface, communications that include an other communication address. The logic circuit is configured to respond, via the interface, to a command series directed to the logic circuit that include the communication address of the logic circuit, based on the detected communications.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: August 9, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Jefferson P. Ward, James Michael Gardner, Anthony D. Studer, David N. Olsen, Quinton B. Weaver, David Owen Roethig, Christopher Hans Bakker, David B. Novak
  • Patent number: 11409487
    Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface including a power terminal and at least one logic circuit. The at least one logic circuit is configured to respond to communications sent to a first address via the interface and respond to communications sent to a second address via the interface. The at least one logic circuit is configured to in response to a first command sent to the first address, draw a first current on the power terminal; and in response to a hibernate command sent to the first address, respond to communications sent to the second address and draw a second current on the power terminal less than the first current.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: August 9, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Stephen D. Panshin
  • Patent number: 11364716
    Abstract: In an example, a logic circuitry package is configured to be addressable via a first address and at least one second address and comprises a first logic circuit. The first address may be an address for the first logic circuit, and the package may be configured such that, in response to a first command indicative of a first command time period sent to the first address, the package is accessible via at least one second address for a duration of the first command time period; and in response to a second command indicative of a second command time period sent to the first address, the first logic circuit is to, for a duration of the second command time period, disregard traffic sent to the first address.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: June 21, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Jefferson P. Ward, Scott A. Linn, James Michael Gardner
  • Patent number: 11366913
    Abstract: In an example, a logic circuitry package is configured to communicate with a print apparatus logic circuit. The logic circuitry package may be configured to respond to communications sent to a first address and to at least one second address. The logic circuitry package may comprise a first logic circuit, wherein the first address is an address for the first logic circuit. The package may be configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the package is accessible via at least one second address for a duration of the time period.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: June 21, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Jefferson P. Ward, Scott A. Linn, James Michael Gardner
  • Publication number: 20220129570
    Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.
    Type: Application
    Filed: January 5, 2022
    Publication date: April 28, 2022
    Inventors: James Michael GARDNER, Scott A. LINN, Stephen D. PANSHIN, Jefferson P. WARD, David Owen ROETHIG
  • Patent number: 11256654
    Abstract: A logic circuitry package for association with a replaceable print apparatus component comprises: logic and a serial data bus interface, wherein the serial data bus interface is to interface with a serial data bus of a print apparatus, and, wherein the logic is, in response to a first command sent to the logic circuitry package via the serial data bus connected to the serial data bus interface, the first command including a time period, to generate a low voltage condition on the serial data bus for a duration based on the time period, and, after the duration, return to a default voltage condition on the serial data bus.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 22, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephen D. Panshin, Scott A. Linn
  • Patent number: 11250146
    Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: February 15, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Scott A. Linn, Stephen D. Panshin, Jefferson P. Ward, David Owen Roethig