Abstract: An improved sampled amplitude read/write channel is provided. The system is an integrated Generalized Partial Response Maximum Likelihood (GPRML) read channel incorporating Read, Write, and Servo modes of operation. One implementation includes a 32/34 rate parity code and matched Viterbi detector, a 32 state Viterbi detector optimal parity processor, robust frame synchronization, self-adapive equalization, thermal asperity detection and compensation, adaptive magneto-resistive asymmetry compensation, low latency interpolated timing recovery and programmable write precompensation.

Abstract: A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value. According to one embodiment, four consecutive samples are used. According to another embodiment, two samples are used. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.

Abstract: The present invention relates to a conversion circuit that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors in the conversion circuit are directly connected to ground. By not having a transistor directly connected to ground, ground current is avoided and crosstalk associated with ground current is eliminated.

Abstract: The present invention relates to a conversion circuit that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors in the conversion circuit are directly connected to ground. By not having a transistor directly connected to ground, ground current is avoided and crosstalk associated with ground current is eliminated.

Abstract: The present invention relates to a conversion circuit that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors in the conversion circuit are directly connected to ground. By not having a transistor directly connected to ground, ground current is avoided and crosstalk associated with ground current is eliminated.

Abstract: The present invention is related to a filter circuit that allows preamplifiers, such as those used in hard disk drives, to quickly recover from transients such transients caused by power switching, write to read switching, and thermal asperity. According to an embodiment of the present invention, under normal conditions, such as signals at 100 KHz to 10 MHz, signals at medium frequencies, such as signals at 100 KHz to 10 MHz, pass through a low pass filtering circuit. When a transient signal is received, then a change in voltage for Vout of the low pass filtering circuit increases by more than 100*Vout. For example, during transient conditions, the low pass filter circuit may also pass signals ranging from 10 MHz to 100 MHz. Accordingly, under transient conditions, the low pass pole moves approximately 100 times or more. A feedback loop subtracts the resulting low pass signals from the original signal, acting as a high pass filter.

Abstract: An amplifier circuit providing high power efficiency and an improved phase margin includes a transconductance input stage, one output of which is connected to an input of a class AB amplifier gain stage to form a compensation node, and the other output of which drives a current gain means, with the outputs of the current gain means and the class AB amplifier forming a current summing output node that is coupled to the compensation node through a compensation capacitor. The phase margin of the amplifier circuit is optimized by selecting the gain of the current gain means to be approximately equal to one plus the ratio of the capacitance of the load to the capacitance of the compensation capacitor.