Patents by Inventor Stephen L Bade

Stephen L Bade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11487643
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing a debugger for integrated scripting applications. One of the methods includes generating a modified script from an original script, the modified script being written in a scripting language and having a respective breakpoint inquiry command for a plurality of original commands from the original script, wherein each breakpoint inquiry command calls a breakpoint inquiry function with a unique identifier assigned to a corresponding original command. The modified script is executed including calling the breakpoint inquiry function before the plurality of original commands from the original script. If a particular call to the breakpoint inquiry function corresponds to a set breakpoint, execution of the modified script is stopped and updated debugging information is provided to a debug client configured to generate a user interface presentation of the updated debugging information.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: November 1, 2022
    Assignee: XILINX, INC.
    Inventor: Stephen L. Bade
  • Patent number: 10977401
    Abstract: Disclosed approaches for creating a circuit design involving a network-on-chip (NoC) include instantiating in a memory of a computer system logic blocks and logical NoC (LNoC) blocks. Each logic block specifies a function of the circuit design and is communicatively coupled to another logic block through an LNoC block. The LNoC blocks are aggregated into a traffic specification that specifies connections between ingress circuits and egress circuits of the NoC. The traffic specification is compiled into configuration parameters for circuits of the NoC, and the logic blocks are compiled into implementation data for the target IC by the computer processor. The target IC can then be configured with the configuration parameters and implementation data.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: April 13, 2021
    Assignee: XILINX, INC.
    Inventors: Jeffrey M. Arnold, Stephen L. Bade, Srinivas Beeravolu, Chukwuweta Chukwudebe, Anindita Patra, Nabeel Shirazi
  • Patent number: 7970596
    Abstract: An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: June 28, 2011
    Assignee: Synopsys, Inc.
    Inventors: Stephen L. Bade, Shay Ben-Chorin, Paul Caamano, Marcelo E. Montoreano, Ani Taggu, Filip C. Thoen, Dean C. Wills
  • Publication number: 20100017185
    Abstract: An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.
    Type: Application
    Filed: September 24, 2009
    Publication date: January 21, 2010
    Applicant: Synopsys, Inc.
    Inventors: Stephen L. Bade, Shay Ben-Chorin, Paul Caamano, Marcelo E. Montoreano, Ani Taggu, Filip C. Thoen, Dean C. Wills
  • Patent number: 7613599
    Abstract: An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: November 3, 2009
    Assignee: Synopsys, Inc.
    Inventors: Stephen L Bade, Shay Ben-Chorin, Paul Caamano, Marcelo E Montoreano, Ani Taggu, Filip C Theon, Dean C Wills
  • Publication number: 20020059054
    Abstract: An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.
    Type: Application
    Filed: June 1, 2001
    Publication date: May 16, 2002
    Inventors: Stephen L. Bade, Shay Ben-Chorin, Paul Caamano, Marcelo E. Montoreano, Ani Taggu, Filip C. Thoen, Dean C. Wills