Abstract: An apparatus for controlling access to a program stored in a read-only memory is described. In one embodiment, the memory includes a random number generator and an encryptor for encrypting random numbers from the generator. A second encryptor which provides identical encryption to the first encryptor is included within the system and is coupled to receive random numbers from the generator. A comparator compares the results from the first and second encryptors and if they are identical, enables the memory. The encryptors are programmable with a 64-bit key and 32-bit random numbers are used. By making the encryption process relatively slow (e.g., one second) many decades are required to break the key.

Abstract: A random number generator is described. The output of two relatively fast digitally controlled oscillators are exclusively ORed and gated by a counter which has a counting rate determined by a relatively slow digitally controlled oscillator. The ORed output is accumulated in the accumulator. During the inactive period of the ORed gate, the counter is preset to a value which is a function of the digital value stored in the accumulator. Further, during this inactive period, selected output lines of the accumulator are also exclusively ORed and gated to shift the accumulated value. The final value of the accumulator is generated as a random number and further provides a seed number for varying the frequency of the two relatively fast oscillators which then provide the foundation for the next random number.

Abstract: An execution unit which is part of a general-purpose microprocessor, partitioned between two integrated circuit chips, with the execution unit on one chip and an instruction unit on another chip. The execution unit provides the interface for accessing a main memory to thereby fetch data and macroinstructions for transfer to the instruction unit when requested to do so by the instruction unit. The execution unit receives arithmetic microinstructions in order to perform various arithmetic operations, and receives access-memory microinstructions in order to develop memory references from logical addresses received from the instruction unit. Arithmetic operations are performed by a data manipulation unit which contains registers and arithmetic capability, controlled by a math sequencer.