Abstract: A low cost half bridge driver IC fabricated in the process technology with a minimum or reduced number of masking steps to implement all the blocks and without the use of the low threshold voltage CMOS. The half bridge driver IC uses a universal 12 Volt supply for all of the blocks with reference to the ground or to the half bridge output. Furthermore, the low differential current from high voltage level shifter transistors of the half bridge driver IC can provide enough voltage swing to set or reset the latch when high threshold voltage DMOS transistors are used in the pulse filter.

Abstract: The server includes a layer for dynamically generating web pages and other data objects using scripts, such as graphic, audio and video files, in dependence on stored information indicating the user's needs and preferences, including those presumed from stored information as to the user's function, job, or purpose for being at the hospital, and logged usage profiles, the level of the user's access privileges to confidential patient information, and the computer and physical environments of the user. Notably, the content is generated in dependence on the display resolution and lowest bandwidth link between the server and browser to limit the waiting time for downloads as well as the server load.

Abstract: A switched bridge circuit includes a low voltage to high voltage interface which selectively controls an input to a high side switch. A controller compares the voltage across the interface, the state of the high side switch, and the output of the circuit. If hard switching is detected by the controller, it latches the voltage across the interface thus keeping the high side switch on to allow the hard switching to occur. If soft switching is detected, the high side switch is kept off. A source follower is used to drive the high side switch so that the circuit output follows the interface output thereby avoiding oscillation. A falling edge detector for the output of the circuit uses the inherent parasitic capacitance of a high voltage device which also forms a bootstrap diode. When the output drops, the parasitic capacitance feeds a resistance which causes a driver to actuate. A second falling edge detector uses the inherent parasitic capacitance of the level shifter switch which is another high voltage device.

Abstract: A high-frequency power amplifier circuit offers the advantages of high input impedance, good linearity, high power efficiency and accurate bias current control in a compact and economical circuit configuration. The amplifier includes a single-ended output stage driven by a symmetrical push-pull emitter follower stage with both active pull-down and active pull-up capability. The emitter follower stage is driven by an active phase-splitter stage, with bias current for the phase-splitter stage and subsequent stages being provided by a bias-current control stage which is directly connected to the phase splitter stage. A linear voltage-to-current converter stage receives a high-frequency input voltage and provides a high-frequency current signal to the input terminal of the bias-current control stage that controls the current in the output stage.

Abstract: A high-frequency power amplifier circuit offers the advantages of high input impedance, high power efficiency and accurate bias current control in a compact and economical circuit configuration. The amplifier includes a single-ended output stage driven by a symmetrical push-pull emitter follower stage with both active pull-down and active pull-up capability. The emitter follower stage is driven by an active phase-splitter stage, with bias current for the phase-splitter stage and subsequent stages being provided by a bias-current control stage which is isolated at high frequencies from the high-frequency input signal to the amplifier.

Abstract: A high-voltage AC to low-voltage DC converter includes a rectifier circuit for providing a pulsating high-voltage DC signal from the high-voltage AC input and a switch having its main current path coupled between the rectifier circuit output and an output terminal of the converter. A filter capacitor is coupled to the output terminal to filter the low-voltage DC output, and first and second voltage sensors are coupled to the rectifier output and the low-voltage DC output terminal of the converter circuit, respectively. The first voltage sensor is set to sense a low (typically zero) voltage, and the second voltage sensor is set to sense the desired low-voltage DC output level.

Abstract: An inductorless voltage biasing circuit is provided for an AC-coupled amplifier of the type having a signal input terminal and a coupling capacitor for coupling the input terminal to a control terminal of the AC-coupled amplifier. The voltage biasing circuit includes a voltage source coupled to the control terminal, with the voltage biasing circuit including a differential-input amplifier having a noninverting input coupled to the voltage source, an inverting input, an output terminal and a differential voltage gain characteristic that decreases as a function of frequency. A resistor is coupled between the inverting input and the output terminal, and the control terminal of the AC-coupled amplifier is coupled to the inverting input of the differential-input amplifier. In this manner, a low-impedance DC-voltage biasing source is provided for an AC-coupled amplifier without using an inductor.

Abstract: In a circuit arrangement including a pair of transistors serially connected together in a totem pole arrangement for bridging two buses at different voltage potentials, a driving scheme for controlling the conductive state of one of the pair of transistors. The scheme includes sensing the voltage difference across this one transistor by comparing a substantially fixed level represented by the voltage potential at one bus to a varying level. The varying level is based on the voltage at a junction joining the two transistors together. When the sensed voltage is at or below a predetermined level this one transistor is turned on.

Abstract: An integrated half-bridge timing control circuit for driving a half-bridge output stage has high-side and low-side power transistors coupled together at a high-voltage output terminal, and a bistable circuit for generating a high-side timing control waveform. The bistable circuit is driven by two delay circuits, each of which is decoupled from the high-side voltage by an associated interface circuit. The interface circuits are driven by input voltages which are delayed with respect to each other and which are referenced to the low side (ground). In this manner, an integrated half-bridge timing control circuit is obtained which is capable of operating at high frequencies with little power loss, which can be easily integrated, and which is both accurate and easily adjustable in operation.

Abstract: A controller for supplying a switching drive voltage signal to a semiconductor power switch includes a wave-shaper circuit that generates a piece wise linear (PWL) waveform that slows the rate of change of the drive voltage supplied to the control electrode of the semiconductor power switch. As a result, the radiated electromagnetic interference generated by the apparatus can be appreciably reduced.

Abstract: Digital processing of current signals allows close matching of arbitrary time delay curves for a circuit breaker. An analog signal proportional to the current is sampled and digitized. Digital samples, with or without further processing, are used to select increment values from a look-up table for accumulation in a counter. The counter is decremented periodically to simulate cooling of the circuit being protected. The values in the look-up table are determined according to the desired time delay curve. Processing of the digital samples may include squaring samples, accumulating the squared values to form a subtotal which is compared with an instantaneous trip threshold, accumulating the subtotals for a time period equal to half a cycle of AC line voltage, taking the square root of the accumulated subtotals, and using that square root as the address for looking up the increment value.

Abstract: A low-power CMOS driver circuit capable of operating at high frequencies includes a CMOS output driver circuit and a pair of CMOS predriver circuits for driving the CMOS output driver circuit. A timing circuit is provided for generating three different timing signals for switching the predriver circuits in such a manner that the CMOS driver circuit is capable of operating at frequencies above 1 MHz without dissipating significant power.

Abstract: An integrated half-bridge driver circuit for driving a half-bridge output stage having high-side and low-side power transistors coupled together at a high-voltage output terminal includes a low-voltage control circuit and a floating well within the integrated circuit which has a timing circuit for controlling the activation of the high-side power transistor. The driver circuit further includes a high-voltage interface circuit for coupling a control signal from the low-voltage control circuit to the timing circuit within the floating well. In this manner, an integrated half-bridge driver circuit is obtained which is capable of operating at high frequencies due to the relatively low power dissipation in the control and timing circuitry.

Abstract: A temperature-compensated voltage regulator includes a field effect transistor voltage buffer which receives a high-voltage input and provides a low-voltage output, and a voltage generator having a series connection of a zener diode and at least one p-n junction diode for generating a reference voltage. The voltage generator is coupled between the low-voltage output of the voltage buffer and the input of a current mirror, with the output of the current mirror being coupled to the gate electrode of the field effect transistor in the voltage buffer. Additionally, the output of the current mirror is coupled to the low-voltage output of the voltage buffer by a resistor. The resulting voltage regulator circuit features high performance in a simple, economical configuration.

Abstract: A low power integrated current source (ICS) for monitoring the voltage at an input terminal includes a current source and a network of current mirror circuits coupled to the current source, to the input terminal and to an output terminal. The circuit monitors the input voltage by comparing the input current with a reference current determined by the current source. The current mirror network responds to a predetermined voltage (current) at the input terminal to switch the output voltage at the output terminal from a first voltage level to a second voltage level. The ICS voltage monitor circuit limits the maximum value of the input current as the input voltage increases beyond a given voltage level thereby limiting the power dissipation. The trip voltage can be reset by merely changing the reference current supplied by the current source or by changing the value of an input resistor whose purpose is to convert the input voltage into an input current.

Abstract: A power supply system employs a control circuit to regulate the voltage across a load capacitor by monitoring the capacitor voltage by means of a differential voltage sensor and by monitoring the drain-source voltage of a switching power FET connected in series with the load capacitor across input terminals that supply a full wave rectified voltage derived from a commercial AC supply voltage. The control circuit controls the switching action of the power FET in a manner such that the load capacitor is charged at least once during each cycle of the rectified voltage (unfiltered). This method of voltage regulation by monitoring the load capacitor voltage and the FET voltage (V.sub.ds) provides significant advantages over other forms of voltage regulation.

Abstract: The input impedance of a high-frequency monolithic integrated-circuit amplifier is modified to increase the maximum output power capability of the amplifier. This modification compensates for a reduction in output resistance at high frequencies caused by feedback capacitance coupling the output and input of the amplifier.

Abstract: An integrated high voltage differential sensor which uses the inverse gain of a pair of parasitic JFETs to provide a low power circuit for translating a differential high voltage signal down to a lower voltage level that can be easily sensed by the low voltage control circuitry in a power IC and without the use of a resistive voltage divider. The IC includes, between a first high voltage input and ground, a first series circuit of a first JFET, a first voltage level shifting resistor and a bias current source (I.sub.B). A second series circuit of a reference resistor (R.sub.L), a second JFET, a second voltage level shifting resistor and a bias current source (I.sub.B) is coupled between a second high voltage input and ground. A feedback circuit including an operational amplifier is coupled between a low voltage point of the first series circuit and the gates of both JFETs so as to adjust the bias voltages of the JFETs.

Abstract: A monolithic microwave buffer amplifier is adapted to increase its input impedance at microwave frequencies. Capacitive reactances in first and second stages of the buffer amplifier appear collectively at the input of the first stage as a negative resistance. Compensating positive resistance is electrically connected to the input of the first stage to cancel the negative resistance and provide a sufficiently high resistive input impedance.

Abstract: Power transistors used as high-side power switches are typically subjected to a variety of potentially destructive conditions, such as loss of bias current or loss of a ground connection in associated control circuitry. In order to protect the power transistor upon occurrence of such a potentially destructive condition, a control electrode disable circuit is provided to ensure that the power transistor will be turned off upon the occurrence of such a condition, or when the control circuits are deliberately turned off or placed in a standby mode. Turn-off of the power transistor is ensured by shunting a disable transistor across the input of the power transistor, and providing a disable circuit for activating the disable transistor in the event of loss of bias or loss of ground in the control circuitry. Reliable activation of the disable transistor is ensured by a bootstrap capacitor circuit in the disable circuit.