Abstract: A system for managing packets incoming to a data router has a local packet memory (LPM) mapped into pre-configured memory units, to store packets for processing, an external packet memory (EPM), a first storage system to store packets in the LPM, and a second storage system to store packets in the EPM. The system is characterized in that the first storage system attempts to store all incoming packets in the LPM, and for those packets that are not compatible with the LPM, relinquishes control to the second system, which stores the LPM-incompatible packets in the EPM.

Abstract: A system for providing directed advertising or informational messages specific to individual persons or vehicles. The system encompasses a sensing and evaluation mechanism to detect persons or vehicles, in conjunction with a billboard or other display device capable of delivering a message specific to one or more individuals.

Abstract: A software program extension for a dynamic multi-streaming processor is disclosed. The extension comprising an instruction set enabling coordinated interaction between a packet management component and a core processing component of the processor. The software program comprises, a portion thereof for managing packet uploads and downloads into and out of memory, a portion thereof for managing specific memory allocations and de-allocations associated with enqueueing and dequeuing data packets, a portion thereof for managing the use of multiple contexts dedicated to the processing of a single data packet; and a portion thereof for managing selection and utilization of arithmetic and other context memory functions associated with data packet processing. The extension complements standard data packet processing program architecture for specific use for processors having a packet management unit that functions independently from a streaming processor unit.

Abstract: A hardware/software system is provided for allocating memory in the form of a buffer zone surrounding a data packet to be stored in the memory. The hardware/software system comprises, first and second registers for storing separate values representing in one register, an amount of memory preceding the first line of the data packet to be stored and in the other the amount succeeding the last line of the packet to be stored, a hardware mechanism for allocating the memory according to computational results computed using the register values and the size of a data packet to be stored, and software for processing stored data packet and for writing any new growth data into the designated buffer zones surrounding the data packet.

Abstract: A logic system in a data packet processor is provided for selecting and releasing one of a plurality of contexts. The selected and released context is dedicated for enabling the processing of interrupt service routines corresponding to interrupts generated in data packet processing and pending for service. The system comprises, a first determination logic for determining control status of all of the contexts, a second determination logic for determining if a context is idle or not, a selection logic for selecting a context and a context release mechanism for releasing the selected context. Determination by the logic system that all contexts are singularly owned by an entity not responsible for packet processing and that at least one of the contexts is idle, triggers immediate selection and release of an idle one of the at least one idle contexts to an entity responsible for packet processing.

Abstract: A system for managing packets incoming to a data router has a local packet memory (LPM) mapped into pre-configured memory units, to store packets for processing, an external packet memory (EPM), a first storage system to store packets in the LPM, and a second storage system to store packets in the EPM. The system is characterized in that the first storage system attempts to store all incoming packets in the LPM, and for those packets that are not compatible with the LPM, relinquishes control to the second system, which stores the LPM-incompatible packets in the EPM.

Abstract: A software program extension for a dynamic multi-streaming processor is disclosed. The extension comprising an instruction set enabling coordinated interaction between a packet management component and a core processing component of the processor. The software program comprises, a portion thereof for managing packet uploads and downloads into and out of memory, a portion thereof for managing specific memory allocations and de-allocations associated with enqueueing and dequeuing data packets, a portion thereof for managing the use of multiple contexts dedicated to the processing of a single data packet; and a portion thereof for managing selection and utilization of arithmetic and other context memory functions associated with data packet processing. The extension complements standard data packet processing program architecture for specific use for processors having a packet management unit that functions independently from a streaming processor unit.

Abstract: A system is provided for enabling a non-speculative pre-fetch operation for processing instructions to be performed in the background ahead of immediate packet processing by a packet processor. The system comprises a packet-management unit for accepting data packets and enqueuing them for processing, a processor unit for processing the data packets, a processor core memory for holding context registers and functional units for processing, a memory for holding a plurality of instruction threads and a software-configurable hardware table for relating queues to pointers to beginnings of instruction threads. The packet-management unit selects an available context in the processor core for processing of a data packet, consults the table, and communicates the pointer to the processor, enabling the processor to perform the non-speculative pre-fetch for instructions.

Abstract: A method and apparatus for remote logging of access to and activity on a computerized network is provided. Logging information is transmitted to a remote log repository and is not maintained by the local log generating machine. After the logging information is stored in the remote repository, the access to the information is controlled by a specific policy that governs the type of information and the time period during which the information is available. No access is provided to information outside the bounds of the access policy. Preferably the remote log repository is outside the jurisdiction of relevant authorities. This allows the access policy between the log generating entity and the log repository to dictate precisely the information that is under the control of the log generating entity.

Abstract: A hardware/software system is provided for allocating memory in the form of a buffer zone surrounding a data packet to be stored in the memory. The hardware/software system comprises, first and second registers for storing separate values representing in one register, an amount of memory preceding the first line of the data packet to be stored and in the other the amount succeeding the last line of the packet to be stored, a hardware mechanism for allocating the memory according to computational results computed using the register values and the size of a data packet to be stored, and software for processing stored data packet and for writing any new growth data into the designated buffer zones surrounding the data packet.

Abstract: In a data-packet processor, a configurable queueing system for packet accounting during processing has a plurality of queues arranged in one or more clusters, an identification mechanism for creating a packet identifier for arriving packets, insertion logic for inserting packet identifiers into queues and for determining into which queue to insert a packet identifier, and selection logic for selecting packet identifiers from queues to initiate processing of identified packets, downloading of completed packets, or for requeueing of the selected packet identifiers.

Abstract: In a data-packet processor, a configurable queueing system for packet accounting during processing has a plurality of queues arranged in one or more clusters, an identification mechanism for creating a packet identifier for arriving packets, insertion logic for inserting packet identifiers into queues and for determining into which queue to insert a packet identifier, and selection logic for selecting packet identifiers from queues to initiate processing of identified packets, downloading of completed packets, or for requeueing of the selected packet identifiers.

Abstract: A hardware/software system is provided for allocating memory in the form of a buffer zone surrounding a data packet to be stored in the memory. The hardware/software system comprises, first and second registers for storing separate values representing in one register, an amount of memory preceding the first line of the data packet to be stored and in the other the amount succeeding the last line of the packet to be stored, a hardware mechanism for allocating the memory according to computational results computed using the register values and the size of a data packet to be stored, and software for processing stored data packet and for writing any new growth data into the designated buffer zones surrounding the data packet.

Abstract: In a data-packet processor, a configurable queueing system for packet accounting during processing has a plurality of queues arranged in one or more clusters, an identification mechanism for creating a packet identifier for arriving packets, insertion logic for inserting packet identifiers into queues and for determining into which queue to insert a packet identifier, and selection logic for selecting packet identifiers from queues to initiate processing of identified packets, downloading of completed packets, or for requeueing of the selected packet identifiers.

Abstract: A system is provided for enabling a non-speculative pre-fetch operation for processing instructions to be performed in the background ahead of immediate packet processing by a packet processor. The system comprises a packet-management unit for accepting data packets and en-queuing them for processing, a processor unit for processing the data packets, a processor core memory for holding context registers and functional units for processing, a memory for holding a plurality of instruction threads and a software-configurable hardware table for relating queues to pointers to beginnings of instruction threads. The packet-management unit selects an available context in the processor core for processing of a data packet, consults the table, and communicates the pointer to the processor, enabling the processor to perform the non-speculative pre-fetch for instructions.

Abstract: A system for managing packets incoming to a data router has a local packet memory (LPM) mapped into pre-configured memory units, to store packets for processing, an external packet memory (EPM), a first storage system to store packets in the LPM, and a second storage system to store packets in the EPM. The system is characterized in that the first storage system attempts to store all incoming packets in the LPM, and for those packets that are not compatible with the LPM, relinquishes control to the second system, which stores the LPM-incompatible packets in the EPM.

Abstract: An apparatus for expanding I/O is described in which no additional strobes or enable lines are necessary from the host controller. By sequencing data in a specific way when output to two existing data or select lines, an expansion I/O device can generate a strobe or enable signal internally. This internal strobe or enable signal is then used to store output data or enable input data. The host controller needs software or firmware to perform the data sequencing, but no additional wires are needed, and no changes are needed to existing peripheral devices. Thus, an existing system can be expanded when there are no additional control lines available and no unused states in existing signals.

Abstract: A software program extension for a dynamic multi-streaming processor is disclosed. The extension comprising an instruction set enabling coordinated interaction between a packet management component and a core processing component of the processor. The software program comprises, a portion thereof for managing packet uploads and downloads into and out of memory, a portion thereof for managing specific memory allocations and de-allocations associated with enqueueing and dequeuing data packets, a portion thereof for managing the use of multiple contexts dedicated to the processing of a single data packet; and a portion thereof for managing selection and utilization of arithmetic and other context memory functions associated with data packet processing. The extension complements standard data packet processing program architecture for specific use for processors having a packet management unit that functions independently from a streaming processor unit.

Abstract: A hardware/software system is provided for allocating memory in the form of a buffer zone surrounding a data packet to be stored in the memory. The hardware/software system comprises, first and second registers for storing separate values representing in one register, an amount of memory preceding the first line of the data packet to be stored and in the other the amount succeeding the last line of the packet to be stored, a hardware mechanism for allocating the memory according to computational results computed using the register values and the size of a data packet to be stored, and software for processing stored data packet and for writing any new growth data into the designated buffer zones surrounding the data packet.

Abstract: A system is provided for enabling a non-speculative pre-fetch operation for processing instructions to be performed in the background ahead of immediate packet processing by a packet processor. The system comprises a packet-management unit for accepting data packets and en-queuing them for processing, a processor unit for processing the data packets, a processor core memory for holding context registers and functional units for processing, a memory for holding a plurality of instruction threads and a software-configurable hardware table for relating queues to pointers to beginnings of instruction threads. The packet-management unit selects an available context in the processor core for processing of a data packet, consults the table, and communicates the pointer to the processor, enabling the processor to perform the non-speculative pre-fetch for instructions.