Patents by Inventor Stephen S. Drofitz
Stephen S. Drofitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6373133Abstract: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.Type: GrantFiled: July 13, 1999Date of Patent: April 16, 2002Assignee: International Business Machines CorporationInventors: Giulio DiGiacomo, Stephen S. Drofitz, Jr., David L. Edwards, Larry D. Gross, Sushumna Iruvanti, Raed A. Sherif, Subhash L. Shinde, David J. Womac, David B. Goland, Lester W. Herron
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Publication number: 20020017715Abstract: A method and structure for thermally connecting a thermal conductor to at least one chip, the thermal conductor including a lower surface and at least one piston extending from the lower surface corresponding to each of the chips, each of the chips having an upper surface opposing each of the pistons, the chips being mounted on a substrate, the method comprising steps of metalizing the lower surface of the thermal conductor and the pistons, applying a solder to the lower surface of the thermal conductor, applying a thermal paste between the upper surface of the chips and the pistons, positioning the substrate and the thermal conductor such that the substrate is aligned with the thermal conductor, biasing the thermal conductor toward the substrate, biasing the pistons toward the chips such that the thermal paste has a consistent thickness between each of the chips and the pistons, reflowing the solder, such that the solder bonds the substrate to the thermal conductor and the pistons form a metallurgical bond wType: ApplicationFiled: January 12, 2001Publication date: February 14, 2002Inventors: Giulio Di Giacomo, Stephen S. Drofitz, David L. Edwards, Sushumna Iruvanti, David J. Womac
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Patent number: 6214647Abstract: A method and structure for thermally connecting a thermal conductor to at least one chip, the thermal conductor including a lower surface and at least one piston extending from the lower surface corresponding to each of the chips, each of the chips having an upper surface opposing each of the pistons, the chips being mounted on a substrate, the method comprising steps of metalizing the lower surface of the thermal conductor and the pistons, applying a solder to the lower surface of the thermal conductor, applying a thermal paste between the upper surface of the chips and the pistons, positioning the substrate and the thermal conductor such that the substrate is aligned with the thermal conductor, biasing the thermal conductor toward the substrate, biasing the pistons toward the chips such that the thermal paste has a consistent thickness between each of the chips and the pistons, reflowing the solder, such that the solder bonds the substrate to the thermal conductor and the pistons form a metallurgical bond wType: GrantFiled: September 23, 1998Date of Patent: April 10, 2001Assignee: International Business Machines CorporationInventors: Giulio Di Giacomo, Stephen S. Drofitz, Jr., David L. Edwards, Sushumna Iruvanti, David J. Womac
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Patent number: 5990418Abstract: A device and method for hermetically sealing an integrated circuit chip between a substrate and a lid while providing effective dissipation of heat generated by the integrated circuit chip. The device includes an integrated circuit chip, carrier substrate, interface coolant, and a lid. The integrated circuit chip is attached to the top of the carrier substrate. The interface coolant is disposed on the top of the integrated circuit chip and the lid is placed on top of the carrier substrate/integrated circuit chip combination and contacts the interface coolant. The interface coolant provides a thermal path for conducting heat from the integrated circuit chip to the lid. The substrate is attached to a circuit board by a ceramic ball grid array (CBGA) or a ceramic column grid array (CCGA).Type: GrantFiled: July 29, 1997Date of Patent: November 23, 1999Assignee: International Business Machines CorporationInventors: Kevin G. Bivona, Jeffrey T. Coffin, Stephen S. Drofitz, Jr., Lewis S. Goldmann, Mario J. Interrante, Sushumna Iruvanti, Raed A. Sherif
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Patent number: 5981310Abstract: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.Type: GrantFiled: January 22, 1998Date of Patent: November 9, 1999Assignee: International Business Machines CorporationInventors: Giulio DiGiacomo, Stephen S. Drofitz, Jr., David L. Edwards, Larry D. Gross, Sushumna Iruvanti, Raed A. Sherif, Subhash L. Shinde, David J. Womac, David B. Goland, Lester W. Herron
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Patent number: 5881944Abstract: The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.Type: GrantFiled: April 30, 1997Date of Patent: March 16, 1999Assignee: International Business Machines CorporationInventors: David L. Edwards, Armando S. Cammarano, Jeffrey T. Coffin, Mark G. Courtney, Stephen S. Drofitz, Jr., Michael J. Ellsworth, Jr., Lewis S. Goldmann, Sushumna Iruvanti, Frank L. Pompeo, William E. Sablinski, Raed A. Sherif, Hilton T. Toy
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Patent number: 5881945Abstract: The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.Type: GrantFiled: April 30, 1997Date of Patent: March 16, 1999Assignee: International Business Machines CorporationInventors: David L. Edwards, Armando S. Cammarano, Jeffrey T. Coffin, Mark G. Courtney, Stephen S. Drofitz, Jr., Michael J. Ellsworth, Jr., Lewis S. Goldmann, Sushumna Iruvanti, Frank L. Pompeo, William E. Sablinski, Raed A. Sherif, Hilton T. Toy
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Patent number: 4272722Abstract: A method for determining the paths of current flow in an irregularly shaped conductor. A metal is plated onto a substrate in the desired geometric pattern. The metal is then brought to within about 4 percent of its melting point and a current is put through it. After an amount of time that depends upon the temperature and current utilized, there will have been a mass migration in the metal resulting in a corrugated surface having ridges and valleys that are parallel to the current flow. The ridges and valleys may be observed optically or by scanning electron microscope.Type: GrantFiled: April 3, 1979Date of Patent: June 9, 1981Assignee: International Business Machines CorporationInventors: Armando S. Cammarano, Giulio DiGiacomo, Stephen S. Drofitz, Jr.