Patents by Inventor Stephen Scott Piper

Stephen Scott Piper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7375442
    Abstract: A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: May 20, 2008
    Assignee: LSI Logic Corporation
    Inventors: Charles Clark Jablonski, Stephen Scott Piper, Sukha R. Ghosh
  • Patent number: 7256517
    Abstract: A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: August 14, 2007
    Assignee: LSI Corporation
    Inventors: Charles Clark Jablonski, Stephen Scott Piper, Sukha R. Ghosh
  • Patent number: 7114658
    Abstract: Intelligent transportable data storage component module for a data processing system and a method for charging a battery for a data storage component in an intelligent transportable data storage component module. The intelligent transportable data storage component module has a data storage component and an intelligent battery backup for providing power to the data storage component. The intelligent battery backup, for example, a battery backup falling within Smart Battery Specifications, has a battery and a battery charger that function as a unit to monitor and charge the battery independent of the host processor and firmware of the data processing system and independent of characteristics of the battery.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: October 3, 2006
    Assignee: LSI Logic Corporation
    Inventors: Benny Lima, Stephen Scott Piper, Dennis James Craton
  • Patent number: 6930514
    Abstract: Systems and methods for transferring data. A circuit transfers information between two buses using different signal voltage levels and multiplexes signals applied to the second bus over multiple devices coupled thereto. The data on a first data bus is transferred at a first voltage level and the data on a second data bus is transferred at a second voltage level. For example, the first data bus may transfer data at 3.3V and the second data bus may transfer data at 5V. A logic device (e.g., a CPLD) is connected between the first and the second data buses for transferring the data between the first and second voltage levels. The logic device is also configured for multiplexing the data with the second voltage level between first and second devices (e.g., one or more LEDs and/or NVSRAMs) connected to the second data bus.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: August 16, 2005
    Assignee: LSI Logic Corporation
    Inventors: Justin Randolph McCollum, Stephen Scott Piper, David Michael Head
  • Publication number: 20040178682
    Abstract: A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage.
    Type: Application
    Filed: August 23, 2001
    Publication date: September 16, 2004
    Applicant: American Megatrends, Inc.
    Inventors: Charles Clark Jablonski, Stephen Scott Piper, Sukha R. Ghosh
  • Publication number: 20040061528
    Abstract: Systems and methods for transferring data. A circuit transfers information between two buses using different signal voltage levels and multiplexes signals applied to the second bus over multiple devices coupled thereto. The data on a first data bus is transferred at a first voltage level and the data on a second data bus is transferred at a second voltage level. For example, the first data bus may transfer data at 3.3V and the second data bus may transfer data at 5V. A logic device (e.g., a CPLD) is connected between the first and the second data buses for transferring the data between the first and second voltage levels. The logic device is also configured for multiplexing the data with the second voltage level between first and second devices (e.g., one or more LEDs and/or NVSRAMs) connected to the second data bus.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Inventors: Justin Randolph McCollum, Stephen Scott Piper, David Michael Head
  • Patent number: 6567899
    Abstract: A transportable memory apparatus including cache memory and a backup battery is provided that is capable of being removed from a first computer system and installed within a second computer system. The transportable memory apparatus includes a control bus that provides appropriate signals such that the presence and status of the transportable memory apparatus can be detected in order to permit the computer system that includes the transportable memory apparatus to be appropriately initialized. As such, methods for initializing a computer system that may include a transportable memory apparatus are also provided.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: May 20, 2003
    Assignee: LSI Logic Corporation
    Inventors: Sukha R. Ghosh, Paresh Chatterjee, Stephen Scott Piper, Marc C. Karasek, Basavaraj Gurupadappa Hallyal
  • Patent number: 6557077
    Abstract: A transportable memory apparatus including cache memory and a backup battery is provided that is capable of being removed from a first computer system and installed within a second computer system. The transportable memory apparatus includes a control bus that provides appropriate signals such that the presence and status of the transportable memory apparatus can be detected in order to permit the computer system that includes the transportable memory apparatus to be appropriately initialized. As such, methods for initializing a computer system that may include a transportable memory apparatus are also provided.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: April 29, 2003
    Assignee: LSI Logic Corporation
    Inventors: Sukha R. Ghosh, Paresh Chatterjee, Stephen Scott Piper, Marc C. Karasek, Basavaraj Gurupadappa Hallyal
  • Publication number: 20020194440
    Abstract: A transportable memory apparatus including cache memory and a backup battery is provided that is capable of being removed from a first computer system and installed within a second computer system. The transportable memory apparatus includes a control bus that provides appropriate signals such that the presence and status of the transportable memory apparatus can be detected in order to permit the computer system that includes the transportable memory apparatus to be appropriately initialized. As such, methods for initializing a computer system that may include a transportable memory apparatus are also provided.
    Type: Application
    Filed: July 1, 2002
    Publication date: December 19, 2002
    Inventors: Sukha R. Ghosh, Paresh Chatterjee, Stephen Scott Piper, Marc C. Karasek, Basavaraj Gurupadappa Hallyal