Patents by Inventor Stephen Thilenius

Stephen Thilenius has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10613613
    Abstract: A memory interface includes: a pull-up device and a pull-down device, wherein the pull-up device couples between a power rail and a data line, and wherein the pull-down device couples between the data line and ground; and a power supply configured to supply a first power supply voltage to the power rail during a terminated data transmission mode in which a receiving memory interface coupled to the data line has an active on-die termination, and wherein the power supply is further configured to supply a second power supply voltage to the power rail during an unterminated data transmission mode in which the on-die termination does not load the data line, the second power supply voltage being less than the first power supply voltage.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: April 7, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Michael Brunolli, Stephen Thilenius, Patrick Isakanian, Vaishnav Srinivas
  • Publication number: 20180129267
    Abstract: A memory interface includes: a pull-up device and a pull-down device, wherein the pull-up device couples between a power rail and a data line, and wherein the pull-down device couples between the data line and ground; and a power supply configured to supply a first power supply voltage to the power rail during a terminated data transmission mode in which a receiving memory interface coupled to the data line has an active on-die termination, and wherein the power supply is further configured to supply a second power supply voltage to the power rail during an unterminated data transmission mode in which the on-die termination does not load the data line, the second power supply voltage being less than the first power supply voltage.
    Type: Application
    Filed: January 5, 2018
    Publication date: May 10, 2018
    Inventors: Michael BRUNOLLI, Stephen THILENIUS, Patrick ISAKANIAN, Vaishnav Srinivas
  • Patent number: 9910482
    Abstract: A memory interface includes: a pull-up device and a pull-down device, wherein the pull-up device couples between a power rail and a data line, and wherein the pull-down device couples between the data line and ground; and a power supply configured to supply a first power supply voltage to the power rail during a terminated data transmission mode in which a receiving memory interface coupled to the data line has an active on-die termination, and wherein the power supply is further configured to supply a second power supply voltage to the power rail during an unterminated data transmission mode in which the on-die termination does not load the data line, the second power supply voltage being less than the first power supply voltage.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: March 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Michael Brunolli, Stephen Thilenius, Patrick Isakanian, Vaishnav Srinivas
  • Patent number: 9859888
    Abstract: A transmitter is disclosed with a pull-up feedback circuit and a feedback circuit. The transmitter includes an output driver for driving an output terminal.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: January 2, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: LuVerne Ray Peterson, Thomas Bryan, Stephen Thilenius
  • Publication number: 20170353185
    Abstract: A transmitter is disclosed with a pull-up feedback circuit and a feedback circuit. The transmitter includes an output driver for driving an output terminal.
    Type: Application
    Filed: June 6, 2016
    Publication date: December 7, 2017
    Inventors: LuVerne Ray Peterson, Thomas Bryan, Stephen Thilenius
  • Patent number: 9698782
    Abstract: A circuit includes a data input in communication with a first transistor stack; a first capacitor having a first capacitance and in communication with a power supply via a first transistor of the first transistor stack, wherein the first transistor is configured to charge the first capacitor in response to the data input receiving a signal corresponding to a first binary value; a data output node coupled between the first transistor stack and a transmission line having a second capacitance; and wherein the first capacitor is coupled between the data output node and a second transistor of the first transistor stack, further wherein the second transistor is configured to discharge the first capacitor to the data output node in response to the data input receiving a signal corresponding to a second binary value.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: July 4, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Luverne Ray Peterson, Thomas Bryan, Stephen Thilenius
  • Publication number: 20170090546
    Abstract: A memory interface includes: a pull-up device and a pull-down device, wherein the pull-up device couples between a power rail and a data line, and wherein the pull-down device couples between the data line and ground; and a power supply configured to supply a first power supply voltage to the power rail during a terminated data transmission mode in which a receiving memory interface coupled to the data line has an active on-die termination, and wherein the power supply is further configured to supply a second power supply voltage to the power rail during an unterminated data transmission mode in which the on-die termination does not load the data line, the second power supply voltage being less than the first power supply voltage.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: Michael Brunolli, Stephen Thilenius, Patrick Isakanian, Vaishnav Srinivas