Abstract: A multi-layer printed circuit board provides at least two sections thereon. One section has a grouping of high-impedance traces and another adjacent section, separated by a dividing line, has a mainly low-impedance signal traces. The high-impedance section has at least one of a ground and power plane separated from a grouping of central layers, containing the high-impedance traces, by at least one empty or “void” layer. The void layer is likewise filled by the ground and power planes in the within low-impedance section by stepping the ground/power plane inwardly toward the central layers while providing another low-impedance signal trace in the layer above and below the respective ground and power planes. In a preferred embodiment there are at least nine layers of circuit board material with high-impedance traces on a central grouping of at least three central board layers with three layers disposed respectively above and below the central board layers.

Abstract: An excIusive OR (XOR) accumulator engine efficiently generates parity from a group of data blocks temporarily stored in a memory of a data processing system. The XOR engine comprises an XOR logic circuit coupled to a multi-stage shift register for accumulating parity calculations generated by the logic circuit. Accumulation of parity within the shift register continues until all of the data blocks within the group have been processed by the logic circuit; thereafter, the data blocks and their generated parity are stored on multiple disks of the data processing system.