Abstract: Circuits and methods for providing an accurate phase shift between a generated output signal and an input signal are disclosed. The circuits and methods enable any amount of accurate phase shift to be set without requiring significant changes in circuitry with each phase shift. The phase shift is set by a voltage applied to a feedback amplifier connected to a low-pass filter and a timer circuit that resets a latch circuit.

Abstract: Multiple phase switching regulators with stage shedding are provided. Multiple phase switching regulators of the present invention have a plurality of single phase switching regulators coupled in parallel to an output capacitor. The plurality of single phase switching regulators supply current to a load at a regulated voltage. A comparator monitors the load current and causes one or more of the single phase switching regulators to be OFF at a low load current threshold. At least one of the single phase switching regulators that remains ON increases its output current so that the multiple phase switching regulator output current continues to match the load current. The present invention may include a second comparator that causes additional single phase switching regulators to be OFF at a second low load current threshold that is lower than the first low load current threshold.

Abstract: Multiple phase switching regulators with stage shedding are provided. Multiple phase switching regulators of the present invention have a plurality of single phase switching regulators coupled in parallel to an output capacitor. The plurality of single phase switching regulators supply current to a load at a regulated voltage. A comparator monitors the load current and causes one or more of the single phase switching regulators to be OFF at a low load current threshold. At least one of the single phase switching regulators that remains ON increases its output current so that the multiple phase switching regulator output current continues to match the load current. The present invention may include a second comparator that causes additional single phase switching regulators to be OFF at a second low load current threshold that is lower than the first low load current threshold.

Abstract: An oscillator circuit that adjusts the oscillation voltage such that the voltage oscillates in a uniform manner independent of changes to frequency. Slope compensation is derived from the oscillation voltage. The adjustment is implemented by using a window comparator to establish a range of operation of the oscillation voltage. When the oscillation voltage is outside the range of operation, the window comparator instructs a counter circuit to either count up or count down, depending on the value of the oscillation voltage relative to the range. This counting then is used to adjust the amount of current which charges the capacitor. Thus, when the peak voltage is too low, the amount of current is adjusted upward. When the peak voltage is too high, the amount of current is adjusted downward. In this fashion, the oscillation voltage is maintained at a substantially uniform value, while the frequency is synchronized to an external clock signal.

Abstract: Circuits and methods for controlling timing and slope compensation in switching regulators are provided. These circuits and methods include a timing control circuit that controls the timing of the switching of one or more switching regulator output stages so that the switching occurs at evenly spaced time intervals, and a slope compensation circuit that produces a slope compensation signal having a waveform that need not match the waveform of any oscillator signal, nor that need have the same period as the oscillator signal. Timing control is performed by dividing a master clock signal using a T flip-flop and a “rolling clock” (or “Johnson counter”) to produce 2N clock phase signals. Slope compensation is provided by generating a slope compensation signal using decoding logic, a digital-to-analog converter (DAC), and an integrator.

Abstract: Circuits and methods for implementing both a soft-start function and a short-circuit timer function in voltage regulator controller circuits using only a single package pin are provided. The soft-start and short-circuit timer functions are performed by measuring the voltage across an external capacitor as the capacitor is charged and discharged by a function control circuit. The soft-start function is performed by charging the capacitor from a completely discharged state using a current source in the function control circuit and by using the capacitor voltage as a current limit signal to gradually increase the current drawn from a voltage source to the normal operating level. The short-circuit timer function is performed by using the charge and discharge times of the capacitor to delay the shutdown of the voltage regulator in response to a short-circuit detection.

Abstract: An improved Class A amplifier has an enhanced slew rate response at high frequencies. A positive feedback path is connected from the output of the amplifier to a point on the gain path. The feedback path includes a capacitor, a resistor and a transistor, the resistor being connected between the base and emitter of the transistor. At relatively high frequencies, the voltage drop across the resistor causes the transistor to turn on, forming a buffered positive feedback path through an additional resistor. The amount of feedback is controlled by the second resistor in the feedback path. In the preferred embodiment, dual feedback paths are connected between the output terminal and different points in the gain path.

Abstract: A horizontal sweep control synchronization circuit fixes the phase relationship between a horizontal synch pulse signal and a flyback signal by utilizing a first phase-lock-loop to fix the phase relationship between an oscillator signal, generated by the first loop, and the synch pulse signal, and a second loop to fix the phase relationship between the flyback signal and the oscillator signal. The first loop locks an edge of the synch pulse signal to the center of the oscillator signal, thereby allowing the synch pulse signal to remain locked to the oscillator signal during vertical retrace. The synchronization circuit only utilizes a single ramp forming circuit, thereby eliminating the jitter associated with multiple ramp forming circuits.

Abstract: A DMOST driver circuit responds to the current flowing in the DMOST and the voltage appearing across it. The current and voltage are multiplied together in a g.sub.m amplifier which is coupled to drive a first input of a diff-amp. The diff-amp has its second input coupled to a source of reference potential. The diff-amp output is coupled to the DMOST gate to create a stabilizing negative feedback loop. The first diff-amp input is also coupled to a reference potential related threshold voltage so that the drive to the DMOST will be controlled by the DMOST power dissipation multiplied by a predetermined constant which is chosen to provide a safe dissipation level.

Abstract: A combined CMOS/linear circuit employs a voltage reference circuit to provide a temperature compensated V.sub.REF output. The circuit includes means for switching the reference circuit off and on in response to the signal on an enable terminal. The voltage reference circuit includes a current mirror feedback which is positive in nature to provide a controlled hysteresis action. This provides noise immunity for the enable input. A digital output indicator is included to indicate the state of the reference circuit.

Abstract: An IC oscillator is disclosed using a small capacitor to determine the fundamental frequency. The capacitor is small enough to permit an on chip capacitor to be used. The capacitor is charged and discharged at the same rate between voltage limits established in the circuit. A single voltage controlled current source controls the charge and discharge currents equally so as to provide a relative low voltage-controlled frequency. The circuit can operate at very low charging currents so that a wide range of control is available. The circuit is configured to produce a very low radiation level.

Abstract: This disclosure describes a recorder/playback system which utilizes a silicon chip having bipolar transistors. One feature is an integral electronic switching arrangement which permits silent and smooth change from the record to the playback mode and vice versa by operation of an external single pole switch. Other features include a circuit for driving a recording level meter, an automatic audio level control circuit (ALC) and integral voltage and current regulators.

Abstract: Disclosed is a differential amplifier having a pair of input terminals and multiple output terminals. Various ones of the output terminals are selectively enabled in response to output selection signals. Within the amplifier is a first transistorized circuit which generates analog signals representative of any voltage difference between the input terminals. A second transistorized circuit within the amplifier couples these analog signals to selected ones of the output terminals in response to the output selection signals.