Abstract: A system for distance calculation is disclosed. The system includes an illuminator unit, one or more camera units, and a distance processor. The illuminator unit illuminates a scene in a target area using a textured pattern creator and wherein the textured pattern creator includes a diffractive optical element. The one or more camera units captures two or more images of the target area from two or more physical locations. A textured pattern illumination is visible in each of the two or more images of the target area. The images are used to calculate distances to one or more points in the scene in the target area.

Abstract: A system for distance calculation is disclosed. The system includes an illuminator unit, one or more camera units, and a distance processor. The illuminator unit illuminates a scene in a target area using a textured pattern creator and wherein the textured pattern creator includes a diffractive optical element. The one or more camera units captures two or more images of the target area from two or more physical locations. A textured pattern illumination is visible in each of the two or more images of the target area. The images are used to calculate distances to one or more points in the scene in the target area.

Abstract: A system for distance calculation is disclosed. The system includes an illuminator unit, one or more camera units, and a distance processor. The illuminator unit illuminates a scene in a target area using a textured pattern creator and wherein the textured pattern creator includes a diffractive optical element. The one or more camera units captures two or more images of the target area from two or more physical locations. A textured pattern illumination is visible in each of the two or more images of the target area. The images are used to calculate distances to one or more points in the scene in the target area.

Abstract: A system for distance calculation is disclosed. The system includes an illuminator unit, one or more camera units, and a distance processor. The illuminator unit illuminates a scene in a target area using a textured pattern creator and wherein the textured pattern creator includes a diffractive optical element. The one or more camera units captures two or more images of the target area from two or more physical locations. A textured pattern illumination is visible in each of the two or more images of the target area. The images are used to calculate distances to one or more points in the scene in the target area.

Abstract: A device to spatially and temporally reorder data a processor, memory and peripherals. This device is able to spatially and temporally reorder data for both write and read operations to and from memory, peripherals and a processor. This device uses a peripheral write path spatial reordering unit and a peripheral write temporal reordering unit to reorder data transmitted to peripherals and the memory. Further, this device users a peripheral read data path spatial reordering unit to reorder data read from peripheral devices. In addition, a main memory spatial reordering unit is utilized to reorder data read from main memory.

Abstract: A computer system adapted for hot-pluggable components such as memory modules that may be replaced, upgraded and/or added without disturbing normal operation of the computer system. A failing memory module may be replaced by copying its contents to a new memory module in a background operation while the computer system runs its operating system and applications programs. When all contents are copied to the new memory module, the failing memory module may be removed without having to shut down the computer system. Computer system memory may be upgraded or added to by inserting the new memory module(s) into vacant disconnected memory connectors, whereupon the computer system automatically recognizes the new memory module(s), synchronously connects the new memory module(s) to the computer system memory bus, initializes the new memory module(s), and then notifies the operating system that the new memory module(s) is available, all without disturbing normal operation of the computer system.

Abstract: A device to spatially and temporally reorder data a processor, memory and peripherals. This device is able to spatially and temporally reorder data for both write and read operations to and from memory, peripherals and a processor. This device uses a peripheral write path spatial reordering unit and a peripheral write temporal reordering unit to reorder data transmitted to peripherals and the memory. Further, this device users a peripheral read data path spatial reordering unit to reorder data read from peripheral devices. In addition, a main memory spatial reordering unit is utilized to reorder data read from main memory.

Abstract: A computer system adapted for hot-pluggable components such as memory modules that may be replaced, upgraded and/or added without disturbing normal operation of the computer system. A failing memory module may be replaced by copying its contents to a new memory module in a background operation while the computer system runs its operating system and applications programs. When all contents are copied to the new memory module, the failing memory module may be removed without having to shut down the computer system. Computer system memory may be upgraded or added to by inserting the new memory module(s) into vacant disconnected memory connectors, whereupon the computer system automatically recognizes the new memory module(s), synchronously connects the new memory module(s) to the computer system memory bus, initializes the new memory module(s), and then notifies the operating system that the new memory module(s) is available, all without disturbing normal operation of the computer system.

Abstract: A method and apparatus for decoupling internal latencies of a bus bridge from those on an external bus is described. In one embodiment, the method includes detecting a write cycle by an initiator for transmitting data to a device. The method further includes asserting a write request to the device, responsive to detecting the write cycle, asserting a ready request to the initiator without detecting an acknowledge from the device, and receiving the data from the initiator.