Patents by Inventor Steve G. Lovejoy

Steve G. Lovejoy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hierarchical layout method for integrated circuits
    Patent number: 6574779
    Abstract: A method for hierarchical layout of an electronic design using an electronic computer aided design system, wherein the method includes generating a parameterized pattern library and using an existing netlist and analyze in a pattern recognizer, from which a list of associations between the pattern library and the netlist is created. Renesting then occurs wherein the netlist using the list of associations is used for generating a hierarchical layout of the electronic components in the design.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: June 3, 2003
    Assignee: International Business Machines Corporation
    Inventors: Robert J. Allen, John M. Cohn, Steve G. Lovejoy
  • Hierarchical layout method for integrated circuits
    Publication number: 20020194575
    Abstract: A method for hierarchical layout of an electronic design using an electronic computer aided design system, wherein the method includes generating a parameterized pattern library and using an existing netlist and analyze in a pattern recognizer, from which a list of associations between the pattern library and the netlist is created. Renesting then occurs wherein the netlist using the list of associations is used for generating a hierarchical layout of the electronic components in the design.
    Type: Application
    Filed: April 12, 2001
    Publication date: December 19, 2002
    Inventors: Robert J. Allen, John M. Cohn, Steve G. Lovejoy