Abstract: Adaptive clock generator including a master clock. A control means detects the current operating mode and, in response, provides a corresponding integer output N. A programmable pulse generator provides an output clock signal comprising a "high" pulse having a predetermined width followed by a "low" pulse having a width of N master clock periods. A dithered clock signal may be provided when the control means provides an integer output N selected from a set of integer values. Preferably, N is selected in a random or pseudo-random manner.

Abstract: A defibrillator/monitor architecture is disclosed with a defibrillator-only mode of operation to provide for shocking a patient notwithstanding failure of the monitor subsystem. The defibrillator/monitor subsystem is partitioned into a defibrillator subsystem and a monitor subsystem. The defibrillator subsystem includes the patient charging circuits and other components necessary to carry out basic defibrillation. The monitor subsystem includes an ECG front-end, CRT display, data recorder and other features. In normal operation, the defibrillator subsystem relies on periodic ECG data ready interrupts from the monitor subsystem for system timing. In the event that the ECG interrupts do not arrive within a predetermined time limit, the monitor subsystem is presumed dead and the defibrillator subsystem switches to defibrillator-only mode of operation, in which system timing is provided by a local standby timer.