Patents by Inventor Steve Su

Steve Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8218555
    Abstract: A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an Internet tuner core, peripherals, and external interfaces.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: July 10, 2012
    Assignee: NVIDIA Corporation
    Inventors: John Shigeto Minami, Robin Yasu Uyeshiro, Michael Ward Johnson, Steve Su
  • Patent number: 7535913
    Abstract: The invention is embodied in a gigabit Ethernet adapter. A system according to the invention provides a compact hardware solution to handling high network communication speeds. In addition, the invention adapts to multiple communication protocols via a modular construction and design.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: May 19, 2009
    Assignee: NVIDIA Corporation
    Inventors: John Shigeto Minami, Robin Yasu Uyeshiro, Michael Ward Johnson, Steve Su, Michael John Sebastian Smith, Addison Kwuanming Chen, Mihir Shaileshbhai Doctor, Daniel Leo Greenfield
  • Publication number: 20070253430
    Abstract: A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an internet tuner core, peripherals, and external interfaces.
    Type: Application
    Filed: December 20, 2006
    Publication date: November 1, 2007
    Inventors: John Minami, Robin Uyeshiro, Michael Johnson, Steve Su
  • Publication number: 20040062267
    Abstract: The invention is embodied in a gigabit Ethernet adapter. A system according to the invention provides a compact hardware solution to handling high network communication speeds. In addition, the invention adapts to multiple communication protocols via a modular construction and design.
    Type: Application
    Filed: June 5, 2003
    Publication date: April 1, 2004
    Inventors: John Shigeto Minami, Robin Yasu Uyeshiro, Michael Ward Johnson, Steve Su, Michael John Sebastian Smith, Addison Kwuanming Chen, Mihir Shaileshbhai Doctor, Daniel Leo Greenfield
  • Publication number: 20030165160
    Abstract: A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an Internet tuner core, peripherals, and external interfaces.
    Type: Application
    Filed: April 23, 2002
    Publication date: September 4, 2003
    Inventors: John Shigeto Minami, Robin Yasu Uyeshiro, Michael Ward Johnson, Steve Su