Patents by Inventor Steve Taatjes

Steve Taatjes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6967174
    Abstract: A wafer chuck includes alignment members that allows a semiconductor wafer to be properly aligned on the chuck without using a separate alignment stage. The alignment members may be cams, for example, attached to arms of the wafer chuck. These members may assume an alignment position when a robot arm places the wafer on the chuck. In this position, they guide the wafer into a proper alignment position with respect to the chuck. During rotation at a particular rotational speed, the alignment members move away from the wafer to allow liquid etchant to flow over the entire edge region of the wafer. At still higher rotational speeds, the wafer is clamped into position to prevent it from flying off the chuck. A clamping cam or other device (such as the alignment member itself) may provide the clamping.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: November 22, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Steve Taatjes, Andy McCutcheon, Jim Schall, Jingbin Feng
  • Patent number: 6537416
    Abstract: A wafer chuck includes alignment members that allows a semiconductor wafer to be properly aligned on the chuck without using a separate alignment stage. The alignment members may be cams, for example, attached to arms of the wafer chuck. These members may assume an alignment position when a robot arm places the wafer on the chuck. In this position, they guide the wafer into a proper alignment position with respect to the chuck. During rotation at a particular rotational speed, the alignment members move away from the wafer to allow liquid etchant to flow over the entire edge region of the wafer. At still higher rotational speeds, the wafer is clamped into position to prevent it from flying off the chuck. A clamping cam or other device (such as the alignment member itself) may provide the clamping.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: March 25, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Steve Taatjes, Andy McCutcheon, Jim Schall, Jinbin Feng
  • Patent number: 6402923
    Abstract: An electrochemical reactor is used to electrofill damascene architecture for integrated circuits. A shield is used to screen the applied field during electroplating operations to compensate for potential drop along the radius of a wafer. The shield establishes an inverse potential drop in the electrolytic fluid to overcome the resistance of a thin film seed layer of copper on the wafer.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: June 11, 2002
    Inventors: Steven T. Mayer, Richard Hill, Alain Harrus, Evan Patton, Robert Contolini, Steve Taatjes, Jon Reid
  • Patent number: 6193859
    Abstract: An apparatus for depositing an electrically conductive layer on the surface of a wafer comprises a flange. The flange has a cylindrical wall and an annulus attached to a first end of the cylindrical wall. The annulus shields the edge region of the wafer surface during electroplating reducing the thickness of the deposited electrically conductive layer on the edge region. Further, the cylindrical wall of the flange can be provided with a plurality of apertures adjacent the wafer allowing gas bubbles entrapped on the wafer surface to readily escape.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: February 27, 2001
    Assignees: Novellus Systems, Inc., International Business Machines Corporation
    Inventors: Robert J. Contolini, Jonathan Reid, Evan Patton, Jingbin Feng, Steve Taatjes, John Owen Dukovic
  • Patent number: 6179983
    Abstract: An apparatus for depositing an electrical conductive layer on the surface of a wafer includes a virtual anode located between the actual anode and the wafer. The virtual anode modifies the electric current flux and plating solution flow between the actual anode and the wafer to thereby modify the thickness profile of the deposited electrically conductive layer on the wafer. The virtual anode can have openings through which the electrical current flux passes. By selectively varying the radius, length, or both, of the openings, any desired thickness profile of the deposited electrically conductive layer on the wafer can be readily obtained.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: January 30, 2001
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan David Reid, Steve Taatjes
  • Patent number: 6159354
    Abstract: An apparatus for depositing an electrically conductive layer on the surface of a wafer comprises a flange. The flange has a cylindrical wall and an annulus attached to a first end of the cylindrical wall. The annulus shields the edge region of the wafer surface during electroplating reducing the thickness of the deposited electrically conductive layer on the edge region. Further, the cylindrical wall of the flange can be provided with a plurality of apertures adjacent the wafer allowing gas bubbles entrapped on the wafer surface to readily escape.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: December 12, 2000
    Assignees: Novellus Systems, Inc., International Business Machines, Inc.
    Inventors: Robert J. Contolini, Jonathan Reid, Evan Patton, Jingbin Feng, Steve Taatjes, John Owen Dukovic