Patents by Inventor Steve W. Heppler

Steve W. Heppler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7998305
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: August 16, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Patent number: 7829190
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: November 9, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Patent number: 7326316
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at feast one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: February 5, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Patent number: 6951684
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: October 4, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Publication number: 20040232391
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Application
    Filed: June 22, 2004
    Publication date: November 25, 2004
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Publication number: 20040229032
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at feast one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Application
    Filed: June 22, 2004
    Publication date: November 18, 2004
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Publication number: 20040209497
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Application
    Filed: May 10, 2004
    Publication date: October 21, 2004
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Patent number: 6777071
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: August 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Publication number: 20030203668
    Abstract: An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at least one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.
    Type: Application
    Filed: April 25, 2002
    Publication date: October 30, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Steve W. Heppler
  • Patent number: 6371840
    Abstract: A method and apparatus are provided for handling planar structures, such as semiconductor wafers, with reduced breakage and cracking. The method includes the step of segmenting a wafer prior to grinding. The apparatus includes a segmented vacuum table for supporting wafer portions in position to be ground to a desired thickness. In another aspect of the invention, adhesive material is employed to individually secure wafer portions in position during the grinding process.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: April 16, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Michael B. Ball, Steve W. Heppler
  • Patent number: 6351022
    Abstract: A method and apparatus are provided for handling planar structures, such as semiconductor wafers, with reduced breakage and cracking. The method includes the step of segmenting a wafer prior to grinding. The apparatus includes a segmented vacuum table for supporting wafer portions in position to be ground to a desired thickness. In another aspect of the invention, adhesive material is employed to individually secure wafer portions in position during the grinding process.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: February 26, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Michael B. Ball, Steve W. Heppler
  • Patent number: 6120360
    Abstract: A method and apparatus are provided for handling planar structures, such as semiconductor wafers, with reduced breakage and cracking. The method includes the step of segmenting a wafer prior to grinding. The apparatus includes a segmented vacuum table for supporting wafer portions in position to be ground to a desired thickness. In another aspect of the invention, adhesive material is employed to individually secure wafer portions in position during the grinding process.
    Type: Grant
    Filed: May 5, 1999
    Date of Patent: September 19, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Michael B. Ball, Steve W. Heppler
  • Patent number: 5920769
    Abstract: A method and apparatus are provided for handling planar structures, such as semiconductor wafers, with reduced breakage and cracking. The method includes the step of segmenting a wafer prior to grinding. The apparatus includes a segmented vacuum table for supporting wafer portions in position to be ground to a desired thickness. In another aspect of the invention, adhesive material is employed to individually secure wafer portions in position during the grinding process.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: July 6, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Michael B. Ball, Steve W. Heppler
  • Patent number: 5348164
    Abstract: There is an IC (integrated circuit) testing device 11 that receives singulated ICs from a singulation station's bottom table 44, where an IC 15 has slid down onto loading ramp or track 16. The IC will slide into test station 18, where stop pin 22 has been inserted to stop the IC in DUT (device under test) station 20. In the DUT station, the IC is securely held in position by an extractor bar 26, insertion bar 28, and a part guide 24. Thereby, test cite station 18 will move downward and insert IC 15 into testing socket 30. After testing the IC, testing station 18 returns upward with the IC in the same secured position. Pin 22 will be removed to allow the IC to slide into part holding station 31. If the IC was not defective, pin 32 will be removed to allow the IC to slide onto track 36 of the IC separator station 34. While the test cite station 18 is in the up position a second IC is slid along track 16 and loaded into DUT cite 20 being readied for the next test cycle.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: September 20, 1994
    Assignee: Micron Semiconductor, Inc.
    Inventor: Steve W. Heppler
  • Patent number: RE38894
    Abstract: There is an IC (integrated circuit) testing device 11 that receives singulated ICs from a singulation station's bottom table 44, where an IC 15 has slid down onto loading ramp or track 16. The IC will slide into test station 18, where stop pin 22 has been inserted to stop the IC in DUT (device under test) station 20. In the DUT station, the IC is securely held in position by an extractor bar 26, insertion bar 28, and a part guide 24. Thereby, test cite station 18 will move downward and insert IC 15 into testing socket 30. After testing the IC, testing station 18 returns upward with IC in the same secured position. Pin 22 will be removed to allow the IC to slide into part holding station 31. If the IC was not defective, pin 32 will be removed to allow the IC to slide onto track 36 of the IC separator station 34. While the test cite station 18 is in the up position a second IC is slid along track 16 and loaded into DUT cite 20 being readied for the next test cycle.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: November 29, 2005
    Assignee: Micron Tehnology, Inc.
    Inventor: Steve W. Heppler