Patents by Inventor Steven B. Alleston

Steven B. Alleston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079849
    Abstract: Disclosed is a coherent optical combining photonic integrated circuit that can detect and align light amplified by a scalable quantity of semiconductor optical amplifiers (SOAs). The light can be split into beams and amplified by individual SOAs in a PIC and combined via couplers in the PIC. The combined light can be measured using a photodetector and the light beams can be adjusted based the photodetector measurement to coherently combine the light to achieve high optical power from the photonic integrated circuit.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 7, 2024
    Inventors: John Parker, Tom Mader, Steven B. Alleston
  • Publication number: 20230291478
    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.
    Type: Application
    Filed: May 15, 2023
    Publication date: September 14, 2023
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
  • Publication number: 20230254042
    Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.
    Type: Application
    Filed: April 4, 2023
    Publication date: August 10, 2023
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffrey J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
  • Patent number: 11689289
    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: June 27, 2023
    Assignee: Juniper Networks, Inc.
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
  • Patent number: 11632175
    Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 18, 2023
    Assignee: Juniper Networks, Inc.
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffery J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
  • Publication number: 20220103261
    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 31, 2022
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
  • Publication number: 20220052759
    Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.
    Type: Application
    Filed: September 9, 2021
    Publication date: February 17, 2022
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffery J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
  • Patent number: 11159238
    Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: October 26, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffery J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
  • Patent number: 11159240
    Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: October 26, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
  • Patent number: 10284290
    Abstract: In some examples, a network device comprises one or more processors operably coupled to a memory, and a routing unit configured for execution by the one or more processors to route data traffic on a layer 3 network overlaying an optical transport system; receive optical supervisory channel data for an optical supervisory channel of the optical transport system; determine the optical supervisory channel data indicates an event affecting transmission or detection of a signal transported by a wavelength, the wavelength traversing an optical fiber of the optical transport system and underlying a link of the layer 3 network; and reconfigure, in response to determining the optical supervisory channel data indicates the event, a configuration of the network device to modify routing operations of the network device with respect to the data traffic on the layer 3 network.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: May 7, 2019
    Assignee: Juniper Networks, Inc.
    Inventors: Gert Grammel, Domenico Di Mola, Steven B. Alleston
  • Patent number: 9780909
    Abstract: In general, techniques are described for dynamically determining a logical network topology for more efficiently transporting network traffic over a physical topology based on end-to-end network traffic demands and optical transport network (OTN) characteristics of the network. The techniques may be applicable to meeting network traffic demands placed upon a multi-layer network having a base transport layer and a logical or overlay Internet Protocol (IP) layer routed on the transport layer.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 3, 2017
    Assignee: Juniper Networks, Inc.
    Inventors: David C. Wood, Massimiliano Salsi, Steven B. Alleston
  • Publication number: 20170093487
    Abstract: In some examples, a network device comprises one or more processors operably coupled to a memory, and a routing unit configured for execution by the one or more processors to route data traffic on a layer 3 network overlaying an optical transport system; receive optical supervisory channel data for an optical supervisory channel of the optical transport system; determine the optical supervisory channel data indicates an event affecting transmission or detection of a signal transported by a wavelength, the wavelength traversing an optical fiber of the optical transport system and underlying a link of the layer 3 network; and reconfigure, in response to determining the optical supervisory channel data indicates the event, a configuration of the network device to modify routing operations of the network device with respect to the data traffic on the layer 3 network.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Gert Grammel, Domenico Di Mola, Steven B. Alleston
  • Publication number: 20160191194
    Abstract: In general, techniques are described for dynamically determining a logical network topology for more efficiently transporting network traffic over a physical topology based on end-to-end network traffic demands and optical transport network (OTN) characteristics of the network. The techniques may be applicable to meeting network traffic demands placed upon a multi-layer network having a base transport layer and a logical or overlay Internet Protocol (IP) layer routed on the transport layer.
    Type: Application
    Filed: June 30, 2015
    Publication date: June 30, 2016
    Inventors: David C. Wood, Massimiliano Salsi, Steven B. Alleston