Abstract: The design of a novel digital controller for a motor driven aircraft arrestment system of the type used on aircraft carriers is described. The unique control and feedback design of the described controller has many advanced features, which provide many advantages over existing designs for controlling advanced arresting gear systems. Gain scheduling in engage/arrest controllers can be done based on estimated parameters such as speed, effective skew angle, and faults to allow optimized engage/arrest controllers, where the gain scheduling can be defined, discretely, for each “bin” as defined for a range of threshold values, or it can be defined, continuously, using interpolation and/or functions of speed and effective skew. Particularly, controller design gain values Kci and Kfi are picked to shape control loop transfer functions and dampen resonances in the aircraft arrestment system.

Abstract: A control system is described that is connected to an advanced arresting gear system. The control system has: (a) an outer control loop; (b) a first inner control loop associated with a port-side motor current controller for outputting a voltage command for controlling a port side motor that controls a port side of an arrestment cable; (c) a second inner control loop associated with a starboard-side motor current controller outputting a second voltage command for controlling a starboard side motor that controls the starboard side of the arrestment cable. Each of the port-side motor current controller and the starboard-side motor controller comprises: a positive sequence controller, at least one negative sequence controller, one or more delay state feedback to counter control loop delays, wherein the delay state feedback provides high bandwidth, low current overshoot, small current rise time and good current stability margins.

Abstract: Disclosed within is a closed loop controller having: (a) a signal processing and statistics subsystem sampling an input data stream from at least one sensor, calculating real-time continuous statistics in the input data stream based on a sliding window technique, and outputting one or more classifications based on the real-time statistics; and (b) an intelligent fuzzy logic controller receiving the one or more classifications from the signal processing and statistics subsystem, accessing a heuristic rule set based on expert knowledge, and outputting a noninvasive stimulation pattern based on the one or more classifications and the heuristic rule set.

Abstract: The design of a novel digital controller for a motor driven aircraft arrestment system of the type used on aircraft carriers is described. The unique control and feedback design of the described controller has many advanced features, which provide many advantages over existing designs for controlling advanced arresting gear systems. Gain scheduling in engage/arrest controllers can be done based on estimated parameters such as speed, effective skew angle, and faults to allow optimized engage/arrest controllers, where the gain scheduling can be defined, discretely, for each “bin” as defined for a range of threshold values, or it can be defined, continuously, using interpolation and/or functions of speed and effective skew.

Abstract: The design of a novel digital controller for a motor driven aircraft arrestment system of the type used on aircraft carriers is described. The unique control and feedback design of the described controller has many advanced features, which provide many advantages over existing designs for controlling advanced arresting gear systems. Also described is a trajectory generator subsystem which provides the port and starboard side speed and position references used by both an engage phase controller and/or an arrest phase controller of the aircraft arrestment system.

Abstract: A current controller is provided having a positive sequence controller and at least one negative sequence controller, where one or more error signals operated on by the positive sequence controller are transformed into at least one sequence reference frame and input to the at least one negative sequence controller with at least one targeted harmonic set by a harmonic factor value.

Abstract: A method (as implemented in a current controller) is provided for higher bandwidth operation based on minimized interference between positive and negative components of a current controller, where the method may be performed without additional filtering on measured currents to isolate positive and negative current components. The method involves: identifying one or more error signals operated on by a positive sequence controller; transforming the one or more error signals into at least one negative sequence reference frame associated with at least one negative sequence controller; inputting transformed error signals to the negative sequence controller, where undesirable interactions between the positive sequence controller and negative sequence controller is minimized by sharing error signals.

Abstract: The design of a novel digital controller for a motor driven aircraft arrestment system of the type used on aircraft carriers is described. The unique control and feedback design of the described controller has many advanced features, which provide many advantages over existing designs for controlling advanced arresting gear systems.

Abstract: A control system is described that is connected to an advanced arresting gear system. The control system has: (a) an outer control loop; (b) a first inner control loop associated with a port-side motor current controller for outputting a voltage command for controlling a port side motor that controls a port side of an arrestment cable; (c) a second inner control loop associated with a starboard-side motor current controller outputting a second voltage command for controlling a starboard side motor that controls the starboard side of the arrestment cable. Each of the port-side motor current controller and the starboard-side motor controller comprises: a positive sequence controller, at least one negative sequence controller, one or more delay state feedback to counter control loop delays, wherein the delay state feedback provides high bandwidth, low current overshoot, small current rise time and good current stability margins.

Abstract: A current controller is provided having a positive sequence controller and at least one negative sequence controller, where one or more error signals operated on by the positive sequence controller are transformed into at least one sequence reference frame and input to the at least one negative sequence controller with at least one targeted harmonic set by a harmonic factor value.

Abstract: A method (as implemented in a current controller) is provided for higher bandwidth operation based on minimized interference between positive and negative components of a current controller, where the method may be performed without additional filtering on measured currents to isolate positive and negative current components. The method involves: identifying one or more error signals operated on by a positive sequence controller; transforming the one or more error signals into at least one negative sequence reference frame associated with at least one negative sequence controller; inputting transformed error signals to the negative sequence controller, where undesirable interactions between the positive sequence controller and negative sequence controller is minimized by sharing error signals.

Abstract: A current controller is provided having a positive sequence controller and a negative sequence controller, where error signals operated on by the positive sequence controller are transformed into a negative sequence reference frame and input to the negative sequence controller. A current controller is also provided having a positive sequence controller, a negative sequence controller, and one or more delay state feedbacks to counter control loop delays, where the delay state feedbacks provide high bandwidth, low current overshoot, small current rise time and good current stability margins. A current controller is also disclosed having a positive sequence controller, a negative sequence controller, and one or more cross coupled gains between a d-axis and a q-axis, where the cross coupled gains are proportional to the speed of a motor associated with the current controller.

Abstract: A hybrid super-capacitor/battery system is disclosed (particularly under high pulsed power and low temperature conditions) which allows an existing battery system to ride through transient loading and provide excellent energy density and power density under practical loading conditions.

Abstract: A current controller is provided having a positive sequence controller and a negative sequence controller, where error signals operated on by the positive sequence controller are transformed into a negative sequence reference frame and input to the negative sequence controller. A current controller is also provided having a positive sequence controller, a negative sequence controller, and one or more delay state feedbacks to counter control loop delays, where the delay state feedbacks provide high bandwidth, low current overshoot, small current rise time and good current stability margins. A current controller is also disclosed having a positive sequence controller, a negative sequence controller, and one or more cross coupled gains between a d-axis and a q-axis, where the cross coupled gains are proportional to the speed of a motor associated with the current controller.

Abstract: A hybrid super-capacitor/battery system is disclosed (particularly under high pulsed power and low temperature conditions) which allows an existing battery system to ride through transient loading and provide excellent energy density and power density under practical loading conditions.