Abstract: Three-level inverter and rectifier power conversion systems and space vector modulation (SVM) controls having even-order harmonic elimination for neutral voltage balancing with a predefined vector switching sequences for half-wave symmetry in open loop system operation. The vector sequence listings for each SVM diagram segment includes switching state entries individually indicating one of three possible switching state levels positive (P), zero (0), or negative (N) for each of three or more switching groups of the power conversion system, with listings for each pair of first and second diametrically opposite diagram segments include symmetrically opposite switching states, with positive levels in the entries of the listing for the first segment corresponding to negative levels in the entries of the listing for the second segment and vice versa.

Abstract: A motor drive and a choke therefor are disclosed, wherein the choke comprises a magnetic core with an inner leg and two outer legs, and four coils, which may be connected in DC current paths in the motor drive. First and second differential coils are wound around first and second outer legs, respectively; and first and second common-mode coils are wound around the inner leg of the choke. The first and second differential coils smooth the DC current on a DC bus in the motor drive, and the first and second common-mode coils suppress common-mode voltages in the motor drive. Also disclosed is a method for suppressing common-mode voltages in a motor drive.

Abstract: A motor drive and a choke therefor are disclosed, wherein the choke comprises a magnetic core with an inner leg and two outer legs, and four coils, which may be connected in DC current paths in the motor drive. First and second differential coils are wound around first and second outer legs, respectively; and first and second common-mode coils are wound around the inner leg of the choke. The first and second differential coils smooth the DC current on a DC bus in the motor drive, and the first and second common-mode coils suppress common-mode voltages in the motor drive. Also disclosed is a method for suppressing common-mode voltages in a motor drive.

Abstract: A motor drive and a choke therefor are disclosed, wherein the choke comprises a magnetic core with an inner leg and two outer legs, and four coils, which may be connected in DC current paths in the motor drive. First and second differential coils are wound around first and second outer legs, respectively; and first and second common-mode coils are wound around the inner leg of the choke. The first and second differential coils smooth the DC current on a DC bus in the motor drive, and the first and second common-mode coils suppress common-mode voltages in the motor drive. Also disclosed is a method for suppressing common-mode voltages in a motor drive.

Abstract: A motor drive and a choke therefor are disclosed, wherein the choke comprises a magnetic core with an inner leg and two outer legs, and four coils, which may be connected in DC current paths in the motor drive. First and second differential coils are wound around first and second outer legs, respectively; and first and second common-mode coils are wound around the inner leg of the choke. The first and second differential coils smooth the DC current on a DC bus in the motor drive, and the first and second common-mode coils suppress common-mode voltages in the motor drive. Also disclosed is a method for suppressing common-mode voltages in a motor drive.

Abstract: A PWM rectifier wherein the switching bridge has m input filter capacitors, each connected at a terminal thereof, to the line side of the bridge. These terminals are used to connect an m-phase a.c. power supply (m>=1) having a per phase system inductance to the bridge. A current smoothing inductor is connected to the load side of the bridge and enables a load to be connected thereto. A switching pattern generator controls the switches in the switching bridge based on a reference output current. A first control loop is provided for determining an active portion of the reference output current based on a desired power level of the load and an m-phase voltage at the capacitor terminals. A second control loop is provided for determining a reactive portion of the reference output current based on the m-phase voltage at the capacitor terminals. The reactive portion of the current is selected so as to obtain a desired per phase power factor, such as unity, on the power supply.

Abstract: The drive for an a.c. induction motor features a rectifier for converting alternating current into direct current and a current source inverter for converting direct current into alternating current supplied to a motor. A d.c. link choke interconnects the rectifier and the inverter. The inverter includes a first control loop which provides a desired or command d.c. link choke current to a second control loop responsible for the rectifier. For the purposes of the second control loop the actual d.c. link choke current and an input voltage of the inverter are detected. The difference or error between the desired and actual d.c. choke currents are minimized by a compensator. The output of the compensator is added to the detected inverter input voltage, and the sum is fed to a switching pattern generator which controls the switches in the rectifier. In this manner the feedback of the inverter input voltage is decoupled from the compensator responsible for the d.c. link choke current.

Abstract: A multi-motor drive in which the resonance existing between one or more output filter capacitors of a current source inverter and an a.c. induction motor is reduced. The inverter features a switching pattern generator which controls the power switches of the inverter based on a reference current. A control loop, connected to the switching pattern generator, measures the load current or voltage and generates a nominal reference current based on an error therein; determines a damping current based on the voltage at the terminal; and determines the reference current supplied to the switching pattern generator by subtracting the damping current from the nominal reference current. The invention essentially simulates the use of a physical damping resistor connected in parallel with each output filter capacitor, but without the corresponding energy loss.