Patents by Inventor Steven E. Krueger

Steven E. Krueger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10303670
    Abstract: An apparatus including a processor to index data records within a data cell, wherein for each data record, the processor retrieves data values from first and second data fields; determines whether the first and second data fields store unique data values; in response to the first data field storing a unique data value, adds an identifier of the data record to a first unique values index, in response to the second data field storing a unique data value, adds the identifier to a second unique values index, wherein identifiers of data records within the unique values indexes are ordered based on corresponding unique data values; and generates an indication of ranges of data values of the first and second data fields to enable a determination of whether a data value specified in search criteria is present within at least the data cell.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: May 28, 2019
    Assignee: SAS INSTITUTE INC.
    Inventors: Brian Payton Bowman, Gordon Lyle Keener, Steven E. Krueger
  • Patent number: 10185721
    Abstract: An apparatus includes a processor component caused to: retrieve metadata of organization of data within a data set, and map data of organization of data blocks within a data file; receive indications of which node devices are available to perform a processing task with a data set portion; and in response to the data set including partitioned data, compare the quantities of available node devices and of the node devices last involved in storing the data set. In response to a match, for each map data map entry: retrieve a hashed identifier for a data sub-block, and a size for each of the data sub-blocks within the corresponding data block; divide the hashed identifier by the quantity of available node devices; compare the modulo value to a designation assigned to each of the available node devices; and provide a pointer to the available node device assigned the matching designation.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: January 22, 2019
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Steven E. Krueger, Richard Todd Knight, Chih-Wei Ho
  • Publication number: 20180276259
    Abstract: An apparatus including a processor to index data records within a data cell, wherein for each data record, the processor retrieves data values from first and second data fields; determines whether the first and second data fields store unique data values; in response to the first data field storing a unique data value, adds an identifier of the data record to a first unique values index, in response to the second data field storing a unique data value, adds the identifier to a second unique values index, wherein identifiers of data records within the unique values indexes are ordered based on corresponding unique data values; and generates an indication of ranges of data values of the first and second data fields to enable a determination of whether a data value specified in search criteria is present within at least the data cell.
    Type: Application
    Filed: May 21, 2018
    Publication date: September 27, 2018
    Applicant: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Gordon Lyle Keener, Steven E. Krueger
  • Patent number: 10013441
    Abstract: An apparatus including a processor to: index multiple data records within a data cell by first and second data fields in a single read pass through the data cell; wherein for each data record within the first data cell, the processor is to retrieve data values from the first and second data fields, search a first binary tree to determine whether the data value from the first data field comprises a unique value, and add the data value to the first binary tree if it is unique, and search a second binary tree to determine whether the data value from the second data field comprises a unique value, and add the data value to the second binary tree if it is unique; and generate a first and second unique values indexes of identifiers of the data records associated with the unique data values within the first and second binary trees.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: July 3, 2018
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Gordon Lyle Keener, Steven E. Krueger
  • Patent number: 10002146
    Abstract: An apparatus including a processor to receive search criteria including a data value for a search within a data field; in response to the receipt of the query instructions, and for each data cell within a super cell, perform the specified search by comparing the data value to ranges of values indicated in a corresponding cell index to determine whether the data cell includes a data record meeting the search criteria, and in response to a determination that the data cell includes such a data record, use a unique values index in the cell index to search the data records of the data cell to identify one or more data records meeting the search criteria; and in response to identifying at least one data record meeting the search criteria, provide an indication that at least the data cell includes at least one data record meeting the search criteria.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: June 19, 2018
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Gordon Lyle Keener, Steven E. Krueger
  • Patent number: 9977807
    Abstract: An apparatus including a processor to: receive search criteria including a data value; in response to receiving the search criteria, generate a hash value from the data value of the search criteria, and for each data cell of a super cell, compare the hash value to hash values within a hash values vector in the corresponding cell index to determine whether the data cell includes at least one data record meeting the search criteria, and in response to determining that the data cell includes at least one of such data record, search the data records to identify one or more data records meeting the search criteria; and in response to identifying at least one data record within at least one data cell of the super cell meeting the search criteria, provide results data indicative of the super cell including at least one of such data record.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: May 22, 2018
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Gordon Lyle Keener, Steven E. Krueger
  • Patent number: 9977805
    Abstract: An apparatus including a processor to index data records within a data cell, wherein for each data record, the processor retrieves data values from first and second data fields; determines whether the first and second data fields store unique data values; in response to the first data field storing a unique data value, adds an identifier of the data record to a first unique values index, in response to the second data field storing a unique data value, adds the identifier to a second unique values index, wherein identifiers of data records within the unique values indexes are ordered based on corresponding unique data values; and generates an indication of ranges of data values of the first and second data fields to enable a determination of whether a data value specified in search criteria is present within at least the data cell.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: May 22, 2018
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Gordon Lyle Keener, Steven E. Krueger
  • Publication number: 20180075051
    Abstract: An apparatus includes a processor component caused to: retrieve metadata of organization of data within a data set, and map data of organization of data blocks within a data file; receive indications of which node devices are available to perform a processing task with a data set portion; and in response to the data set including partitioned data, compare the quantities of available node devices and of the node devices last involved in storing the data set. In response to a match, for each map data map entry: retrieve a hashed identifier for a data sub-block, and a size for each of the data sub-blocks within the corresponding data block; divide the hashed identifier by the quantity of available node devices; compare the modulo value to a designation assigned to each of the available node devices; and provide a pointer to the available node device assigned the matching designation.
    Type: Application
    Filed: November 6, 2017
    Publication date: March 15, 2018
    Applicant: SAS Institute Inc.
    Inventors: BRIAN PAYTON BOWMAN, STEVEN E. KRUEGER, RICHARD TODD KNIGHT, CHIH-WEI HO
  • Patent number: 9811524
    Abstract: An apparatus comprising a processor component to: provide, to a control device, an indication of availability to perform a processing task with one or more data set portions as a node device; perform a processing task specified by the control device with the one or more data set portions; and request a pointer to a location at which to store the one or more data set portions as a data block within a data file. In response to the data set including partitioned data, for each data set portion, include a data sub-block size of the data set portion and a hashed identifier derived from a partition label of a partition in the request; receive, from the control device, the requested pointer to the location; and store each data set portion as a data sub-block within the data block starting at the location within the data file.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: November 7, 2017
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Steven E. Krueger, Richard Todd Knight, Chih-Wei Ho
  • Patent number: 9785467
    Abstract: An apparatus includes a processor and a storage storing instructions causing the processor to determine whether an analysis routine is multi-threaded and calls a library function of a non-threadsafe library, and if so, causes the processor to: instantiate an analysis process for executing the analysis routine on multiple threads; instantiate an instance of the library for execution within a isolated library process; instantiate another instance of the library for execution within another isolated library process; retrieve library metadata providing a function prototype of the library function; employ the function prototype to generate an instance of a bridge routine to enable a call from the analysis routine on a first thread to the library function; employ the function prototype to generate another instance of the bridge routine to enable a call from the analysis routine on a second thread to the library function; and begin execution of the analysis routine.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: October 10, 2017
    Assignee: SAS Institute Inc.
    Inventors: Stacey Michelle Christian, Steven Daniel Miles, Steven E. Krueger
  • Publication number: 20170277562
    Abstract: An apparatus includes a processor and a storage storing instructions causing the processor to determine whether an analysis routine is multi-threaded and calls a library function of a non-threadsafe library, and if so, causes the processor to: instantiate an analysis process for executing the analysis routine on multiple threads; instantiate an instance of the library for execution within a isolated library process; instantiate another instance of the library for execution within another isolated library process; retrieve library metadata providing a function prototype of the library function; employ the function prototype to generate an instance of a bridge routine to enable a call from the analysis routine on a first thread to the library function; employ the function prototype to generate another instance of the bridge routine to enable a call from the analysis routine on a second thread to the library function; and begin execution of the analysis routine.
    Type: Application
    Filed: March 21, 2017
    Publication date: September 28, 2017
    Applicant: SAS Institute Inc.
    Inventors: Stacey Michelle Christian, Steven Daniel Miles, Steven E. Krueger
  • Patent number: 9703789
    Abstract: An apparatus comprising a processor component to: receive metadata of data organization within a data set; receive indications of which node devices will be storing the data set as multiple data blocks within a data file; and receive, from each node device, a pointer request to a location within the data file for storing a data set portion as a data block. In response to the data set including partitioned data, for each request for a pointer: determine the location within the data file; generate a map data map entry for the data block; generate therein a sub-block count of data sub-blocks within the data block; generate therein a sub-entry for each data sub-block including size and a hashed identifier derived from a partition label; and provide a pointer to the node device. In response to successful storage of all data blocks, store the map data in the data file.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: July 11, 2017
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Steven E. Krueger, Richard Todd Knight, Chih-Wei Ho
  • Patent number: 9619148
    Abstract: An apparatus includes processor component caused to: retrieve metadata of organization of data within a data set, and map data of organization of data blocks within a data file; receive indications of which node devices are available to perform a processing task with a data set portion; and in response to the data set including partitioned data, compare the quantities of available node devices and of the node devices last involved in storing the data set. In response to a match, for each map data map entry: retrieve a hashed identifier for a data sub-block, and a size for each of the data sub-blocks within the corresponding data block; divide the hashed identifier by the quantity of available node devices; compare the modulo value to a designation assigned to each of the available node devices; and provide a pointer to the available node device assigned the matching designation.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: April 11, 2017
    Assignee: SAS Institute Inc.
    Inventors: Brian Payton Bowman, Steven E. Krueger, Richard Todd Knight, Chih-Wei Ho
  • Publication number: 20170031936
    Abstract: An apparatus comprising a processor component to: provide, to a control device, an indication of availability to perform a processing task with one or more data set portions as a node device; perform a processing task specified by the control device with the one or more data set portions; and request a pointer to a location at which to store the one or more data set portions as a data block within a data file. In response to the data set including partitioned data, for each data set portion, include a data sub-block size of the data set portion and a hashed identifier derived from a partition label of a partition in the request; receive, from the control device, the requested pointer to the location; and store each data set portion as a data sub-block within the data block starting at the location within the data file.
    Type: Application
    Filed: July 26, 2016
    Publication date: February 2, 2017
    Applicant: SAS Institute Inc.
    Inventors: BRIAN PAYTON BOWMAN, STEVEN E. KRUEGER, RICHARD TODD KNIGHT, CHIH-WEI HO
  • Publication number: 20170031599
    Abstract: An apparatus includes a processor component caused to: retrieve metadata of organization of data within a data set, and map data of organization of data blocks within a data file; receive indications of which node devices are available to perform a processing task with a data set portion; and in response to the data set including partitioned data, compare the quantities of available node devices and of the node devices last involved in storing the data set. In response to a match, for each map data map entry: retrieve a hashed identifier for a data sub-block, and a size for each of the data sub-blocks within the corresponding data block; divide the hashed identifier by the quantity of available node devices; compare the modulo value to a designation assigned to each of the available node devices; and provide a pointer to the available node device assigned the matching designation.
    Type: Application
    Filed: July 26, 2016
    Publication date: February 2, 2017
    Applicant: SAS Institute Inc.
    Inventors: BRIAN PAYTON BOWMAN, STEVEN E. KRUEGER, RICHARD TODD KNIGHT, CHIH-WEI HO
  • Publication number: 20170031937
    Abstract: An apparatus comprising a processor component to: receive metadata of data organization within a data set; receive indications of which node devices will be storing the data set as multiple data blocks within a data file; and receive, from each node device, a pointer request to a location within the data file for storing a data set portion as a data block. In response to the data set including partitioned data, for each request for a pointer: determine the location within the data file; generate a map data map entry for the data block; generate therein a sub-block count of data sub-blocks within the data block; generate therein a sub-entry for each data sub-block including size and a hashed identifier derived from a partition label; and provide a pointer to the node device. In response to successful storage of all data blocks, store the map data in the data file.
    Type: Application
    Filed: July 26, 2016
    Publication date: February 2, 2017
    Applicant: SAS Institute Inc.
    Inventors: BRIAN PAYTON BOWMAN, STEVEN E. KRUEGER, RICHARD TODD KNIGHT, CHIH-WEI HO
  • Patent number: 7320121
    Abstract: A computer-implemented system and method for generating code. The system and method receive source code that includes a higher order computer language statement. Machine code is generated from the received source code. The generated machine code is placed directly into volatile memory for access by a computer program.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: January 15, 2008
    Assignee: SAS Institute Inc.
    Inventor: Steven E. Krueger
  • Patent number: 7007815
    Abstract: A storage rack has upright columns supporting vertically cambered beams having step box or channel shapes accommodating a generally horizontal deck for carrying pallets and product loads. The beams have upward cambers or convex curvatures that increase the load carrying capacity of the rack.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: March 7, 2006
    Assignee: Steel King Industries, Inc.
    Inventors: Jayce S. Anderson, Gary J. Rosenberg, Steven E. Krueger, William R. Sniff
  • Patent number: 7003762
    Abstract: A computer-implemented system and method for handling run-time exceptions. Source code is provided as input to a compiler. The source code includes an exception branching statement and an exception catching statement. The compiler generates machine code from the source code. During execution of the machine code, an exception occurs and execution branches to the exception catching statement in accordance with the exception branching statement.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: February 21, 2006
    Assignee: SAS Institute Inc.
    Inventor: Steven E. Krueger
  • Patent number: 6920990
    Abstract: A protector for an upright column of a product storage rack has a V-shaped body with flat side walls joined to a convex curved vertical apex section. Pairs of studs cooperate with keyhole slots in the column to releasably mount the protector on the column. A releasable latch mounted on the protector engages the column to prevent removal of the protector from the column. The latch can be moved out of engagement from the column to permit the protector to be removed from the column.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: July 26, 2005
    Assignee: Steel King Industries, Inc.
    Inventors: Steven E. Krueger, Gary J. Rosenberg