Patents by Inventor Steven Eaton

Steven Eaton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10832747
    Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: November 10, 2020
    Assignee: Integrated Silicon Solution, Inc.
    Inventors: Steven Eaton, Matthew Manning
  • Publication number: 20190172511
    Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.
    Type: Application
    Filed: January 29, 2019
    Publication date: June 6, 2019
    Inventors: Steven Eaton, Matthew Manning
  • Patent number: 10236042
    Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: March 19, 2019
    Assignee: Integrated Silicon Solution, Inc.
    Inventors: Steven Eaton, Matthew Manning
  • Patent number: 10068626
    Abstract: A clock timing adjust circuit is incorporated in a clocked integrated circuit to detect an input clock frequency and to adjust the timing latency of an internal control signal for accessing a memory element in the clocked integrated circuit. The clock timing adjust circuit introduces an adjustable timing latency to an internal control signal derived from the command signal. The clock timing adjust circuit operates to adjust the timing latency of the control signal to cause clock based operations to either be advanced or delayed by one or more clock cycles in response to the clock frequency detection. In one embodiment, the clock timing adjust circuit includes a clock frequency detect circuit and a latency adjust circuit. The clock timing adjust circuit can operate at both high and low clock frequencies to ensure that undesired data collision events are obviated without introducing unnecessary delays.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: September 4, 2018
    Assignee: Integrated Silicon Solution, Inc.
    Inventors: Steven Eaton, Matthew Manning
  • Publication number: 20180122440
    Abstract: A method in a clocked integrated circuit receiving an input clock signal having a clock frequency and a command signal for accessing a memory element in the clocked integrated circuit. The method detects the input clock signal having a clock frequency above or below a frequency threshold. The method generates a clock detect output signal having a first logical state in response to the clock frequency being below the frequency threshold and generates the clock detect output signal having a second logical state in response to the clock frequency being above the frequency threshold. The method delays the command signal by a first timing latency to generate a timing adjusted control signal where the first timing latency is one or more clock periods of the input clock signal. Finally, the method adjusts the first timing latency in response to the clock detect output signal.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Matthew Manning, Steven Eaton
  • Publication number: 20180122438
    Abstract: A clock timing adjust circuit is incorporated in a clocked integrated circuit to detect an input clock frequency and to adjust the timing latency of an internal control signal for accessing a memory element in the clocked integrated circuit. The clock timing adjust circuit introduces an adjustable timing latency to an internal control signal derived from the command signal. The clock timing adjust circuit operates to adjust the timing latency of the control signal to cause clock based operations to either be advanced or delayed by one or more clock cycles in response to the clock frequency detection. In one embodiment, the clock timing adjust circuit includes a clock frequency detect circuit and a latency adjust circuit. The clock timing adjust circuit can operate at both high and low clock frequencies to ensure that undesired data collision events are obviated without introducing unnecessary delays.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Inventors: Matthew Manning, Steven Eaton
  • Patent number: 8990325
    Abstract: A system and method is provided to enable clients to interact with a content resource (e.g., a webpage) in real-time, so that contributions from each client terminal is communicated to the other client terminals in real-time. Each client terminal can respond to real-time updates by locally updating the content resource to include most recent contributions.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: March 24, 2015
    Assignee: CBS Interactive Inc.
    Inventors: Steven Eaton, Ryan Goodlett, Daniel Gould Hobbs, Jeremy Lwanga
  • Publication number: 20130290516
    Abstract: A system and method is provided to enable clients to interact with a content resource (e.g., a webpage) in real-time, so that contributions from each client is communicated to the other clients in real-time.
    Type: Application
    Filed: April 30, 2012
    Publication date: October 31, 2013
    Inventors: Steven EATON, Ryan Goodlett, Daniel Gould Hobbs, Jeremy Lwanga
  • Publication number: 20060230819
    Abstract: A profiler or scanning probe microscope may be scanned across a sample surface with a distance between them controlled to allow the sensing tip to contact the surface intermittently in order to find and measure features of interest. The distance is controlled so that when the sensing tip is raised or lowered to touch the sample surface, there is no lateral relative motion between the tip and the sample. This prevents tip damage. Prior knowledge of the height distribution of the sample surface may be provided or measured and used for positioning the sensing tip initially or in controlling the separation to avoid lateral contact between the tip and the sample. The process may also be performed in two parts: a fast find mode to find the features and a subsequent measurement mode to measure the features. A quick step mode may also be performed by choosing steps of lateral relative motion to be smaller than 100 nanometers to reduce probability of tip damage.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 19, 2006
    Applicant: KLA-Tencor Corporation
    Inventors: Thomas McWaid, Peter Panagas, Steven Eaton, Amin Samsavar, William Wheeler
  • Publication number: 20060207318
    Abstract: A profiler or scanning probe microscope may be scanned across a sample surface with a distance between them controlled to allow the sensing tip to contact the surface intermittently in order to find and measure features of interest. The distance is controlled so that when the sensing tip is raised or lowered to touch the sample surface, there is no lateral relative motion between the tip and the sample. This prevents tip damage. Prior knowledge of the height distribution of the sample surface may be provided or measured and used for positioning the sensing tip initially or in controlling the separation to avoid lateral contact between the tip and the sample. The process may also be performed in two parts: a fast find mode to find the features and a subsequent measurement mode to measure the features. A quick step mode may also be performed by choosing steps of lateral relative motion to be smaller than 100 nanometers to reduce probability of tip damage.
    Type: Application
    Filed: June 5, 2006
    Publication date: September 21, 2006
    Applicant: KLA-Tencor Corporation
    Inventors: Thomas McWaid, Peter Panagas, Steven Eaton, Amin Samsavar, William Wheeler
  • Publication number: 20060130571
    Abstract: A sensor housing assembly for mounting a tire pressure sensor module within the pressurized cavity of a wheel and tire assembly includes a central housing that includes a housing bottom and defines a cavity therein. A bobbin cover is coupled to the central housing. The bobbin cover and the central housing are mountable to a mounting surface on the wheel. The bobbin cover and the central housing bottom include curved mounting surfaces that are complementary to a curvature of the mounting surface on the wheel. At least one bobbin assembly is received in the bobbin cover. The bobbin assembly is substantially straight and coupled to the central housing at a downward angle toward the wheel.
    Type: Application
    Filed: December 22, 2004
    Publication date: June 22, 2006
    Inventors: Roger Thrush, Eric Laurer, Steven Eaton
  • Publication number: 20050262931
    Abstract: A profiler or scanning probe microscope may be scanned across a sample surface with a distance between them controlled to allow the sensing tip to contact the surface intermittently in order to find and measure features of interest. The distance is controlled so that when the sensing tip is raised or lowered to touch the sample surface, there is no lateral relative motion between the tip and the sample. This prevents tip damage. Prior knowledge of the height distribution of the sample surface may be provided or measured and used for positioning the sensing tip initially or in controlling the separation to avoid lateral contact between the tip and the sample. The process may also be performed in two parts: a fast find mode to find the features and a subsequent measurement mode to measure the features. A quick step mode may also be performed by choosing steps of lateral relative motion to be smaller than 100 nanometers to reduce probability of tip damage.
    Type: Application
    Filed: July 28, 2005
    Publication date: December 1, 2005
    Inventors: Thomas McWaid, Peter Panagas, Steven Eaton, Amin Samsavar, William Wheeler
  • Publication number: 20050096926
    Abstract: A system and method for automating the transfer of real estate. A centralized server or servers are connected to a distributed computer network that is connected between a plurality of client computers. A real estate record is created on the centralized server and information is received on the server from a plurality of sources including real estate databases, computer input devices, facsimile equipment, and electronic mail systems. The centralized server is integrated with a multiple listing service wherein information can be automatically exchanged therebetween. Fax or email communications may include documents for storage on the server. The fax or email sender enters a record identifier wherein the server recognizes the record identifier and determines whether it matches an existing real estate record. If so, the server converts the document to digital form if necessary and saves it to the matching real estate record.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Inventors: Steven Eaton, William Shannon, Karen Karam, David DeRees
  • Publication number: 20050005688
    Abstract: A dual stage scanning instrument includes a sensor for sensing a parameter of a sample and coarse and fine stages for causing relative motion between the sensor and the sample. The coarse stage has a resolution of about 1 micrometer and the fine stage has a resolution of 1 nanometer or better. The sensor is used to sense the parameter when both stages cause relative motion between the sensor assembly and the sample. The sensor may be used to sense height variations of the sample surface as well as thermal variations, electrostatic, magnetic, light reflectivity or light transmission parameters at the same time when height variation is sensed. By performing along scan at a coarser resolution and short scans a high resolution using the same probe tip or two probe tips at fixed relative positions, data obtained from the long and short scans can be correlated accurately.
    Type: Application
    Filed: June 14, 2004
    Publication date: January 13, 2005
    Inventors: Amin Samsavar, William Wheeler, Steven Eaton, Jian-Ping Zhuang