Abstract: An illumination system for a scanner according to one example embodiment includes an array of visible light emitting diodes including a red, a blue and a green light emitting diode and an ultraviolet light emitting device configured to emit light predominantly in the ultraviolet region of the electromagnetic spectrum. During a scan sequence of the red, blue and green light emitting diodes, at least one of the visible light emitting diodes and the ultraviolet light emitting device are positioned to simultaneously illuminate an object being scanned. In one form, during the sequence, the blue light emitting diode and the ultraviolet light emitting device are simultaneously illuminated while in another the red light emitting diode and the ultraviolet light emitting device are simultaneously illuminated.

Abstract: An Ethernet cable used with an Ethernet test-set allows a single connection to an Ethernet port of a network element while maintaining individual connections to separate ports on the test-set. The far-end of the signal path is a single Ethernet cable port having its transmit and receive pins interconnected. The far-end port interconnections cause a test signal which has traveled to the far-end port to be returned to the test-set and to be receive in a test-set port other than the originating port Two signal paths can be simultaneously tested with the same test-kit. Interconnections between the test-set ports by way of the cable maintain a “no-signal”alarm disabled, which otherwise would be energized because there is no signal being received in the port from which the test signal originated.

Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g., and “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g., by execution of a “Fill” or other memory-producer instruction).

Abstract: The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution units, which are shared by the processing units, execute instructions from the threads. An event delivery mechanism delivers events—such as, by way of non-limiting example, hardware interrupts, software-initiated signaling events (“software events”) and memory events—to respective threads without execution of instructions. Each event can, per aspects of the invention, be processed by the respective thread without execution of instructions outside that thread. The threads need not be constrained to execute on the same respective processing units during the lives of those threads—though, in some embodiments, they can be so constrained. The execution units execute instructions from the threads without needing to know what threads those instructions are from.

Abstract: An illumination system for a scanner according to one example embodiment includes an array of visible light emitting diodes each configured to emit light predominantly in the visible region of the electromagnetic spectrum and an ultraviolet light emitting device configured to emit light predominantly in the ultraviolet region of the electromagnetic spectrum. The visible light emitting diodes and the ultraviolet light emitting device are positioned to illuminate an object being scanned.

Abstract: A method for reducing specular reflection in an image. The method includes capturing a first exposure of a scan surface using a first of a plurality of light sources, capturing a second exposure of a scan surface using a second of a plurality of light sources, determining which pixels captured by the light sources are speckles, and replacing a value of at least one speckle in the image with a different pixel value.

Abstract: The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution units, which are shared by the processing units, execute instructions from the threads. An event delivery mechanism delivers events—such as, by way of non-limiting example, hardware interrupts, software-initiated signaling events (“software events”) and memory events—to respective threads without execution of instructions. Each event can, per aspects of the invention, be processed by the respective thread without execution of instructions outside that thread. The threads need not be constrained to execute on the same respective processing units during the lives of those threads—though, in some embodiments, they can be so constrained. The execution units execute instructions from the threads without needing to know what threads those instructions are from.

Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g., and “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g, by execution of a “Fill” or other memory-producer instruction).

Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing withing such processor can execute a memory instruction (e.g.

Abstract: An Ethernet cable for use with an Ethernet test-set which allows a single connection to an Ethernet port of a network element while maintaining individual connections to two separate ports on the test-set, thereby allowing a successful test of a signal path in an Ethernet network to be conducted when the far-end of the signal path is a single Ethernet cable port having its transmit and receive pins interconnected. The far-end port interconnections cause a test signal which has traveled to the far-end port to be returned to the test-set and, in view of the cable configuration, to be received in a test-set port other than the port from which the signal test signal originated. Test-sets do not permit test signals to be returned to ports from which they originate. In an embodiment, two signal paths can be simultaneously tested with the same test-kit.

Abstract: A device may include one or more components and a processor. The one or more components may obtain bit-error-rates of a signal and signal-to-noise ratios of the signal. The processor may select a target signal-to-noise ratio for the signal, determine a target noise level based on the target signal-to-noise ratio, set a noise level of the signal to the target noise level, determine a signal-to-noise ratio of the signal via the one or more components, adjust the noise level of the signal based on the determined signal-to-noise ratio, to stabilize the signal-to-noise ratio, determine a bit-error-rate of the signal via the one or more components, and record the bit-error-rate.

Abstract: The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution units, which are shared by the processing units, execute instructions from the threads. An event delivery mechanism delivers events—such as, by way of non-limiting example, hardware interrupts, software-initiated signaling events (“software events”) and memory events—to respective threads without execution of instructions. Each event can, per aspects of the invention, be processed by the respective thread without execution of instructions outside that thread. The threads need not be constrained to execute on the same respective processing units during the lives of those threads—though, in some embodiments, they can be so constrained. The execution units execute instructions from the threads without needing to know what threads those instructions are from.

Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.

Abstract: In an array of pixels, a method for segmenting a selected pixel of the array between at least two layers including identifying an N-by-N window centered upon the selected pixel, evaluating at least one pixel in the N-by-N window to determine whether the selected pixel is a potential text element, identifying an M-by-M window centered upon the selected pixel when the evaluation determines that the selected pixel is a potential text element, wherein the M-by-M window is smaller than the N-by-N window, and determining whether the potential text element includes text by comparing at least two pixels within the M-by-M window.

Abstract: The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution units, which are shared by the processing units, execute instructions from the threads. An event delivery mechanism delivers events—such as, by way of non-limiting example, hardware interrupts, software-initiated signaling events (“software events”) and memory events—to respective threads without execution of instructions. Each event can, per aspects of the invention, be processed by the respective thread without execution of instructions outside that thread. The threads need not be constrained to execute on the same respective processing units during the lives of those threads—though, in some embodiments, they can be so constrained. The execution units execute instructions from the threads without needing to know what threads those instructions are from.

Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.

Abstract: A system, method and apparatus dedicated to accessing certain aspects of the Internet. The system includes a hardware device having a display and firmware associated with the display. The firmware includes a web browser and an operating system, configured to automatically connect to a datacenter server using the web browser, and to receive a frameset template from the datacenter, the frameset including frames, wherein each frame includes a preset content locator, upon boot of the operating system. The data center server may have preconfigured framesets with assigned content locators, and be configured to transmit one or more of the framesets to the device. Each frame may include content from transmitted from a different internet server upon boot of the operating system.

Abstract: The present invention relates to providing a printing device which allows for user authentication. The printing device may communicate with the authentication device using universal serial bus (USB) protocol, wherein the printing device contains a universal serial bus (USB) host. User authentication may encompass the provision of valid identifying information or presenting sufficient funds as a condition prior to performing a print job or granting access to data.

Abstract: A roof support for an underground mine which has a hydraulic cylinder positioned between a roof engaging support and a ground engaging base and has a flexible gas barrier or enclosure surrounding surfaces of said hydraulic cylinder which are subject to corrosion by gases present in the underground mine. Continuous flowing non-corrosive gas such as nitrogen is supplied to a space between the gas barrier and the hydraulic cylinder for preventing corrosion of cylinder surfaces by corrosive gases present in the mine which may include hydrogen sulfide.

Abstract: A method for detecting loss of SF6 gas from electrical utility apparatus determines a molar ratio of gas in a container at an initial time and of gas in the container at a subsequent time. Measurement of temperature is determined by averaging ambient temperature and temperature of the surface of the container. The initial values of pressure and temperature define the initial value of n as follows: no=Pgas o/Tgas o The value at a subsequent time is nn=Pgas n/Tgas n The molar ratio can be defined as nn/no or as no/nn.