Patents by Inventor Steven G. Kopacek

Steven G. Kopacek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-core communications module, data communications system incorporating a multi-core communications module, and data communications process
    Patent number: 7099983
    Abstract: A communications module for a data communications system having a plurality of data processors comprises a plurality of ports, each coupled to a respective one of the data processors. An address table associates addresses of a memory space to addresses of the data processors. The memory space may include addressable FIFOs, SRAM memory and/or flag registers. In the case of FIFOs, a counter coupled to the FIFO supplies a flag or ready signal indicating the not-full or not-empty status of the respective FIFO, which is supplied to a master device that is writing data to the FIFO or that is reading data from the FIFO so that the writing master device will write only when the FIFO is not full and the reading master device will read only when the FIFO is not empty.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: August 29, 2006
    Assignee: LSI Logic Corporation
    Inventors: Steven M. Emerson, Gregory F. Hammitt, Steven G. Kopacek
  • System method for use of hardware semaphores for resource release notification wherein messages comprises read-modify-write operation and address
    Patent number: 7007108
    Abstract: A method for resource notification is disclosed. The method generally comprises the steps of (A) buffering a plurality of messages received from a plurality of busses, (B) arbitrating among the messages, (C) writing the messages in response to the arbitration, and (D) generating a plurality of notification signals on a plurality of lines in response to the messages as written to a plurality of addresses.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: February 28, 2006
    Assignee: LSI Logic Corporation
    Inventors: Steven M. Emerson, Gregory F. Hammitt, Steven G. Kopacek
  • Method for use of hardware semaphores for resource release notification
    Publication number: 20040221246
    Abstract: A method for resource notification is disclosed. The method generally comprises the steps of (A) buffering a plurality of messages received from a plurality of busses, (B) arbitrating among the messages, (C) writing the messages in response to the arbitration, and (D) generating a plurality of notification signals on a plurality of lines in response to the messages as written to a plurality of addresses.
    Type: Application
    Filed: April 30, 2003
    Publication date: November 4, 2004
    Applicant: LSI LOGIC CORPORATION
    Inventors: Steven M. Emerson, Gregory F. Hammitt, Steven G. Kopacek
  • Multi-core communications module, data communications system incorporating a multi-core communications module, and data communications process
    Publication number: 20040103230
    Abstract: A communications module for a data communications system having a plurality of data processors comprises a plurality of ports, each coupled to a respective one of the data processors. An address table associates addresses of a memory space to addresses of the data processors. The memory space may include addressable FIFOs, SRAM memory and/or flag registers. In the case of FIFOs, a counter coupled to the FIFO supplies a flag or ready signal indicating the not-full or not-empty status of the respective FIFO, which is supplied to a master device that is writing data to the FIFO or that is reading data from the FIFO so that the writing master device will write only when the FIFO is not full and the reading master device will read only when the FIFO is not empty.
    Type: Application
    Filed: November 25, 2002
    Publication date: May 27, 2004
    Inventors: Steven M. Emerson, Gregory F. Hammitt, Steven G. Kopacek