Patents by Inventor Steven H. Boettcher
Steven H. Boettcher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230381705Abstract: A device that comprises an outer component, an inner component and a filter module. The outer component includes a first hollow cylinder, and exterior ports in sidewalls of the first hollow cylinder. The inner component is positioned coaxially within the first hollow cylinder, and includes a second cylinder, and interior ports in the second cylinder, wherein the interior fluid ports are aligned parallel to the exterior ports. The filter module includes a hollow prism positioned coaxially within the outer component and surrounding the inner component, the hollow prism comprising at least four faces configured to retain filters. The filter module also includes vanes positioned along edges connecting the at least four faces and forming seals with the first hollow cylinder. A first filter is provided on a first face, of the at least four faces, which is aligned between a pair of the interior and exterior ports.Type: ApplicationFiled: May 25, 2022Publication date: November 30, 2023Inventors: Madhana Sunder, Allan Cory VanDeventer, Jay A. Bunt, Joyce E. Molinelli Acocella, Heather Nicole Polgrean, Hongqing Zhang, Steven H. Boettcher
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Patent number: 7560692Abstract: A high quality electron microscopy sample suitable for electron holography is prepared by forming markers filled with TEOS oxide and by repeatedly applying multiple coats of an adhesive followed by a relatively low temperature cure after each application. The TEOS oxide marker is readily visible during the polish, has a similar polish rate as a semiconductor material, and reduces contamination during sample preparation. The repeated application of adhesives separated by relatively low temperature cures increases the adhesive strength of the adhesive material to the semiconductor material without making it too brittle. This results in an improved control and yield of the sample preparation process.Type: GrantFiled: December 28, 2006Date of Patent: July 14, 2009Assignees: International Business Machines Corporation, Dongbu Electronics Co., Ltd.Inventors: Keith E. Barton, Steven H. Boettcher, John G. Gaudiello, Leon J. Kimball, Yun-Yu Wang
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Publication number: 20080237053Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; wherein the opening has an underlayer of cobalt and/or nickel therein, barrier layer of an alloy of cobalt and/or nickel; and tungsten is provided.Type: ApplicationFiled: May 27, 2008Publication date: October 2, 2008Applicant: International Business Machines CorporationInventors: Panayotis Andricacos, Steven H. Boettcher, Sandra G. Malhotra, Milan Paunovic, Craig Ransom
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Publication number: 20080156987Abstract: A high quality electron microscopy sample suitable for electron holography is prepared by forming markers filled with TEOS oxide and by repeatedly applying multiple coats of an adhesive followed by a relatively low temperature cure after each application. TEOS oxide marker is readily visible during the polish, has a similar polish rate as semiconductor material, and reduces contamination during the sample preparation. The repeated application of adhesives separated by relatively low temperature cures increases the adhesive strength of the adhesive material to the semiconductor material without making it too brittle. This results in an improved control and yield of the sample preparation process.Type: ApplicationFiled: December 28, 2006Publication date: July 3, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Keith E. Barton, Steven H. Boettcher, John G. Gaudiello, Leon J. Kimball, Yun Yu Wang
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Patent number: 7227265Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 ?m and via openings filled with electroplated copper than is substantially free of internal seams or voids.Type: GrantFiled: March 29, 2004Date of Patent: June 5, 2007Assignee: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
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Patent number: 7214935Abstract: A method for preparing a transmission electron microscopy (TEM) sample for electron holography includes forming a sacrificial material over an area of interest on the sample, and polishing the sample to a desired thickness, wherein the area of interest is protected from rounding during the polishing. The sacrificial material is removed from the sample following the polishing.Type: GrantFiled: September 30, 2004Date of Patent: May 8, 2007Assignee: International Business Machines CorporationInventors: Thomas A. Bauer, Steven H. Boettcher, Anthony G. Domenicucci, John G. Gaudiello, Leon J. Kimball, Jeffrey S. McMurray, Yun-Yu Wang
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Patent number: 6911229Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.Type: GrantFiled: August 9, 2002Date of Patent: June 28, 2005Assignee: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Publication number: 20040178077Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 &mgr;m and via openings filled with electroplated copper than is substantially free of internal seams or voids.Type: ApplicationFiled: March 29, 2004Publication date: September 16, 2004Applicant: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
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Publication number: 20040178078Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 &mgr;m and via openings filled with electroplated copper than is substantially free of internal seams or voids.Type: ApplicationFiled: March 29, 2004Publication date: September 16, 2004Applicant: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
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Publication number: 20040108136Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; wherein the opening has an underlayer of cobalt and/or nickel therein, barrier layer of an alloy of cobalt and/or nickel; and tungsten is provided.Type: ApplicationFiled: December 4, 2002Publication date: June 10, 2004Applicant: International Business Machines CorporationInventors: Panayotis Andricacos, Steven H. Boettcher, Sandra G. Malhotra, Milan Paunovic, Craig Ransom
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Publication number: 20040028882Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.Type: ApplicationFiled: August 9, 2002Publication date: February 12, 2004Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Patent number: 6572982Abstract: An electromigration-resistant copper film structure and the process for forming the structure. The film structure contains a high impurity content, is resistant to grain growth, and possesses superior metallurgical, thermo-mechanical, and electrical properties. The process comprises the steps of: (a) providing a seed layer at least indirectly on a substrate, the seed layer having an exposed surface; (b) immersing the substrate in a plating solution; (c) electrodepositing a copper-containing film on the exposed surface of the seed layer, the copper-containing film having a first surface; (d) maintaining the substrate in an immersed state within the plating solution; (e) electrodepositing a further copper-containing film from the plating solution onto the first surface; (f) removing the substrate from the plating solution; and (g) drying the substrate.Type: GrantFiled: June 27, 2000Date of Patent: June 3, 2003Assignee: International Business Machines CorporationInventors: Cyprian E. Uzoh, Steven H. Boettcher, Patrick W. DeHaven, Christopher C. Parks, Andrew H. Simon
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Publication number: 20020092673Abstract: An interconnection structure is provided wherein comprises a substrate having a dielectric layer with a via opening therein; wherein the opening has a barrier layer; and electrodeposited copper.Type: ApplicationFiled: January 17, 2001Publication date: July 18, 2002Applicant: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Patent number: 6416812Abstract: Copper is deposited onto a barrier layer such as tungsten from an electroless copper plating bath having a pH of at least 12.89 and a deposition rate of 50 nanometers/minute or less.Type: GrantFiled: June 29, 2000Date of Patent: July 9, 2002Assignee: International Business Machines CorporationInventors: Panayotis Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Publication number: 20020081842Abstract: A semiconductor structure, having a semiconductor dielectric material having an opening. A first material lining the opening, the first material comprising MXY, where M is selected from the group consisting of cobalt and nickel, X is selected from the group consisting of tungsten and silicon and Y is selected from the group consisting of phosphorus and boron and a second material filling the lined dielectric material.Type: ApplicationFiled: April 14, 2000Publication date: June 27, 2002Inventors: Carlos J. Sambucetti, Steven H. Boettcher, Peter S. Locke, Judith M. Rubino, Soon-Cheon Seo
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Patent number: 6383929Abstract: In integrated circuits having copper interconnect and low-k interlayer dielectrics, a problem of open circuits after heat treatment was discovered and solved by the use of a first liner layer of Ti, followed by a conformal liner layer of CVD TiN, followed in turn by a final liner layer of Ta or TaN, thus improving adhesion between the via and the underlying copper layer while reducing the increase in resistance caused by alloying between the Ti and the Copper to an acceptable amount.Type: GrantFiled: January 11, 2001Date of Patent: May 7, 2002Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.Inventors: Steven H. Boettcher, Herbert L. Ho, Mark Hoinkis, Hyun Koo Lee, Yun-Yu Wang, Kwong Hon Wong
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Patent number: 6123825Abstract: An electromigration-resistant copper film structure and the process for forming the structure. The film structure contains a high impurity content, is resistant to grain growth, and possesses superior metallurgical, thermo-mechanical, and electrical properties. The process comprises the steps of: (a) providing a seed layer at least indirectly on a substrate, the seed layer having an exposed surface; (b) immersing the substrate in a plating solution; (c) electrodepositing a copper-containing film on the exposed surface of the seed layer, the copper-containing film having a first surface; (d) maintaining the substrate in an immersed state within the plating solution; (e) electrodepositing a further copper-containing film from the plating solution onto the first surface; (f) removing the substrate from the plating solution; and (g) drying the substrate.Type: GrantFiled: December 2, 1998Date of Patent: September 26, 2000Assignee: International Business Machines CorporationInventors: Cyprian E. Uzoh, Steven H. Boettcher, Patrick W. DeHaven, Christopher C. Parks, Andrew H. Simon