Abstract: A testing apparatus, system and method for testing computer memory modules are disclosed. The apparatus includes a motherboard having a processor and at least one resident memory socket fixed to the motherboard. A remote memory socket is provided and located a distance from the resident memory socket, such as on a periphery of the motherboard. The remote memory socket is coupled to the resident memory socket by a conductor assembly such as a ribbon cable and an adapter. A memory module is placed in the remote memory socket and tested using a signal or combination of signals from the processor. A plurality of motherboards, each being configured with remote memory sockets, may be combined to form a testing system suitable for use with an automated handler.

Abstract: An adapter and method for aligning and connecting the external leads of at least one integrated circuit device to conductors on a substrate of a multi-chip module. The adapter includes a component frame configured to receive the integrated circuit device. The component frame is attached to a support member. The support member with attached component frame is placed over one side of the multi-chip module substrate and the external leads of the integrated circuit device are aligned with corresponding conductors on the multi-chip module substrate. A second support member, which may also have a component frame attached thereto, is placed over the opposing side of the multi-chip module substrate. The ends of the first support member are attached to the ends of the second support member such that the external leads of the IC device are forced into electrical contact with the corresponding conductors on the multi-chip module substrate.

Abstract: A testing apparatus, system and method for testing computer memory modules are disclosed. The apparatus includes a motherboard having a processor and at least one resident memory socket fixed to the motherboard. A remote memory socket is provided and located a distance from the resident memory socket, such as on a periphery of the motherboard. The remote memory socket is coupled to the resident memory socket by a conductor assembly such as a ribbon cable and an adapter. A memory module is placed in the remote memory socket and tested using a signal or combination of signals from the processor. A plurality of motherboards, each being configured with remote memory sockets, may be combined to form a testing system suitable for use with an automated handler.

Abstract: An adapter and method for aligning and non-permanently connecting the external leads of a plurality of integrated circuit devices to conductors on a substrate of a multi-chip module. The adapter includes a plurality of component frames, each component frame being configured to receive at least one integrated circuit device. The plurality of component frames is attached to at least one support member. The support member with attached component frames is placed over one side of the multi-chip module substrate and the external leads of the integrated circuit devices are aligned with corresponding conductors on the multi-chip module substrate. A second support member, which may also have component frames attached thereto, is placed over the opposing side of the multi-chip module substrate.

Abstract: A testing apparatus system and method for testing computer memory modules. The apparatus includes a motherboard having a processor and at least one resident memory socket fixed to the motherboard. A remote memory socket is provided and located a distance from the resident memory socket, such as on a periphery of the motherboard. The remote memory socket is coupled to the resident memory socket by a conductor assembly such as a ribbon cable and an adapter. A memory module is placed in the remote memory socket and tested using a signal or combination of signals from the processor. A plurality of motherboards, each being configured with remote memory sockets, may be combined to form a testing system suitable for use with an automated handler.

Abstract: A memory module socket having a transposed pinout allowing the socket to be mounted on the second, or reverse, surface of a motherboard and connected to circuit traces configured for mounting of a memory socket on the first, or processor, surface of the motherboard to correctly accommodate signals between the motherboard and the memory module. A motherboard having at least one memory socket mounted on the second, opposing surface enhancing access to the memory socket or sockets for insertion and removal of memory modules for testing memory modules in multimotherboard test systems. A method of converting a conventional motherboard and memory socket assembly for such testing.

Abstract: A memory module socket having a transposed pinout allowing the socket to be mounted on the second, or reverse, surface of a motherboard and connected to circuit traces configured for mounting of a memory socket on the first, or processor, surface of the motherboard to correctly accommodate signals between the motherboard and the memory module is disclosed. A motherboard having at least one memory socket mounted on the second, opposing surface enhancing access to the memory socket or sockets for insertion and removal of memory modules for testing the memory modules in multimotherboard test systems is also described. The invention further includes a method of converting a conventional motherboard and memory socket assembly for such testing.

Abstract: A memory module socket having a transposed pinout allowing the socket to be mounted on the second, or reverse, surface of a motherboard and connected to circuit traces configured for mounting of a memory socket on the first, or processor, surface of the motherboard to correctly accommodate signals between the motherboard and the memory module is disclosed. A motherboard having at least one memory socket mounted on the second, opposing surface enhancing access to the memory socket or sockets for insertion and removal of memory modules for testing the memory modules in multimotherboard test systems is also described. The invention further includes a method of converting a conventional motherboard and memory socket assembly for such testing.

Abstract: A memory module socket having a transposed pinout allowing the socket to be mounted on the second, or reverse, surface of a motherboard and connected to circuit traces configured for mounting of a memory socket on the first, or processor, surface of the motherboard to correctly accommodate signals between the motherboard and the memory module. A motherboard having at least one memory socket mounted on the second, opposing surface enhancing access to the memory socket or sockets for insertion and removal of memory modules for testing the memory modules in multimotherboard test systems. A method of converting a conventional motherboard and memory socket assembly for such testing.

Abstract: A memory module socket having a transposed pinout allowing the socket to be mounted on the second, or reverse, surface of a motherboard and connected to circuit traces configured for mounting of a memory socket on the first, or processor, surface of the motherboard to correctly accommodate signals between the motherboard and the memory module. A motherboard having at least one memory socket mounted on the second, opposing surface enhancing access to the memory socket or sockets for insertion and removal of memory modules for testing the memory modules in multimotherboard test systems. A method of converting a conventional motherboard and memory socket assembly for such testing.

Abstract: A testing apparatus, system and method for testing computer memory modules. The apparatus includes a motherboard having a processor and at least one resident memory socket fixed to the motherboard. A remote-memory socket is provided and located a distance from the resident memory socket, such as on a periphery of the motherboard. The remote memory socket is coupled to the resident memory socket by a conductor assembly such as a ribbon cable and an adapter. A memory module is placed in the remote memory socket and tested using a signal or combination of signals from the processor. A plurality of motherboards, each being configured with remote memory sockets, may be combined to form a testing system suitable for use with an automated handler.

Abstract: A memory module socket having a transposed pinout allowing the socket to be mounted on the second, or reverse, surface of a motherboard and connected to circuit traces configured for mounting of a memory socket on the first, or processor, surface of the motherboard to correctly accommodate signals between the motherboard and the memory module. A motherboard having at least one memory socket mounted on the second, opposing surface enhancing access to the memory socket or sockets for insertion and removal of memory modules for testing memory modules in multimotherboard test systems. A method of converting a conventional motherboard and memory socket assembly for such testing.

Abstract: An adapter and method for aligning and non-permanently connecting the external leads of a plurality of integrated circuit devices to conductors on a substrate of a multi-chip module. The adapter includes a plurality of component frames, each component frame being configured to receive at least one integrated circuit device. The plurality of component frames is attached to at least one support member. The support member with attached component frames is placed over one side of the multi-chip module substrate and the external leads of the integrated circuit devices are aligned with corresponding conductors on the multi-chip module substrate. A second support member, which may also have component frames attached thereto, is placed over the opposing side of the multi-chip module substrate.

Abstract: An adapter and method for aligning and non-permanently connecting the external leads of a plurality of integrated circuit devices to conductors on a substrate of a multi-chip module. The adapter includes a plurality of component frames, each component frame being configured to receive at least one integrated circuit device. The plurality of component frames is attached to at least one support rod. The support rod with attached component frames is placed over one side of the multi-chip module substrate and the external leads of the integrated circuit devices are aligned with corresponding conductors on the multi-chip module substrate. A second support rod, which may also have component frames attached thereto, is placed over the opposing side of the multi-chip module substrate.

Abstract: A test module for simultaneously testing a plurality of IC packages in a simulated multi-chip module environment. The test module includes a module board adapted to receive the IC packages and a plurality of module adapters configured to secure the IC packages to the module board. The module adapters secure the IC packages to the module board and establish electrical contact between the IC package leads and a plurality of contact pads disposed on the module board, with no permanent bonding agent. Reliable electrical connections are established between the IC package leads and the contact pads by a plurality of protruding pins extending from each module adapter, which bias the IC package leads towards the contact pads. A plurality of IC packages assembled into the test module may be subjected to module level testing.

Abstract: Disclosed is a device for supporting and transporting at least one object which has a plurality of apertures extending therethrough. The device comprises a handle, and a plurality of legs connected to the handle. At least a portion of the legs are configured to be inserted into at least one of the plurality of apertures. The device further comprises a plurality of support members attached to the portion of the plurality of legs and sized to fit within the apertures in object. Each of the support members have a support edge and are movable to an extended position wherein the support edges collectively define a surface supporting the at least one object. The device facilitates carrying of the objects.

Abstract: A batch of devices is installed in a handler of a tester. A known qualification test is executed on the batch of devices to determine a first resultant binout. The resultant binout for the batch is stored. Without displacing the devices, a trial qualification test is executed on the batch of devices in the handler of the tester to determine a second resultant binout. The first resultant binout is compared to the second resultant binout for each device of the batch of devices. For example, each device may be categorized as either a correlating part, an upgraded part or a downgraded part.

Abstract: A batch of devices is installed in a handler of a tester. A known qualification test is executed on the batch of devices to determine a first resultant binout. The resultant binout for the batch is stored. Without displacing the devices, a trial qualification test is executed on the batch of devices in the handler of the tester to determine a second resultant binout. The first resultant binout is compared to the second resultant binout for each device of the batch of devices. For example, each device may be categorized as either a correlating part, an upgraded part or a downgraded part.

Abstract: Disclosed is a device for supporting and transporting at least one object which has a plurality of apertures extending therethrough. The device comprises a handle, and a plurality of legs connected to the handle. At least a portion of the legs are configured to be inserted into at least one of the plurality of apertures. The device further comprises a plurality of support members attached to the portion of the plurality of legs and sized to fit within the apertures in object. Each of the support members have a support edge and are movable to an extended position wherein the support edges collectively define a surface supporting the at least one object. The device facilitates carrying of the objects.

Abstract: A system for efficiently testing and diagnosing memory arrays. One embodiment of the testing system efficiently identifies faulty memory cells in a memory chip, and subsequently removes the memory chip containing the faulty memory cells from the testing process. The system includes a testing module and an active port list which includes an identifier for each of a plurality of memory chips.