Patents by Inventor Steven J. Perron

Steven J. Perron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10973710
    Abstract: Absorbent article including a chassis and fastening tab. The fastening tab includes a carrier, a first fastener having first male fastening elements, and a second fastener. The second fastener includes a backing with first and second opposing surfaces, with second male fastening elements on the first surface. A first portion of the second surface of the backing is connected to the carrier, and a second portion of the second surface of the backing is attached to the topsheet side of the chassis. The carrier is attached to the backsheet side of the chassis. Some fastening laminates, before attachment to the article, have the second portion of the second fastener folded over to face the first portion of the second fastener. Other laminates have the second fastener positioned with its first surface toward the carrier and attached to the carrier with a film.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: April 13, 2021
    Assignee: 3M Innovative Properties Company
    Inventors: Mark A. Peltier, Timothy V. Stagg, Leigh E. Wood, Thomas J. Gilbert, Steven J. Perron
  • Patent number: 10967624
    Abstract: The article includes a thermoplastic layer having opposing first and second side edges and a first surface bearing male fastening elements. The thermoplastic layer is plastically deformed and has a retardance profile having an average retardance along a line from the first edge to a location 500 micrometers from the first edge and a distance from the first edge where 75% of the average retardance is observed of at least 10 micrometers. In some cases, a distance between the first and second side edges is up to 50 millimeters. In some cases, the article is a fastening tab. The method includes providing a thermoplastic film having opposing first and second side edges, with a distance between the opposing side edges of up to 50 millimeters, and stretching the thermoplastic film to form the thermoplastic layer, which is plastically deformed. The first surface of the thermoplastic film bears male fastening elements.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: April 6, 2021
    Assignee: 3M Innovative Properties Company
    Inventors: Thomas J. Gilbert, Todd L. Nelson, Neelakandan Chandrasekaran, Steven J. Perron, Timothy P. Pariseau, Mark A. Peltier
  • Patent number: 10289392
    Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: May 14, 2019
    Assignee: International Business Machines Corporation
    Inventors: Jaques Clapauch, Steven J. Perron
  • Patent number: 10223089
    Abstract: A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Perron
  • Publication number: 20190065163
    Abstract: A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.
    Type: Application
    Filed: October 27, 2017
    Publication date: February 28, 2019
    Inventor: Steven J. Perron
  • Publication number: 20180368535
    Abstract: The article includes a thermoplastic layer having opposing first and second side edges and a first surface bearing male fastening elements. The thermoplastic layer is plastically deformed and has a retardance profile having an average retardance along a line from the first edge to a location 500 micrometers from the first edge and a distance from the first edge where 75% of the average retardance is observed of at least 10 micrometers. In some cases, a distance between the first and second side edges is up to 50 millimeters. In some cases, the article is a fastening tab. The method includes providing a thermoplastic film having opposing first and second side edges, with a distance between the opposing side edges of up to 50 millimeters, and stretching the thermoplastic film to form the thermoplastic layer, which is plastically deformed. The first surface of the thermoplastic film bears male fastening elements.
    Type: Application
    Filed: December 19, 2016
    Publication date: December 27, 2018
    Applicant: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Thomas J. Gilbert, Todd L. Nelson, Neelakandan Chandrasekaran, Steven J. Perron, Timothy P. Pariseau, Mark A. Peltier
  • Patent number: 10133561
    Abstract: A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: November 20, 2018
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Perron
  • Publication number: 20180101368
    Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.
    Type: Application
    Filed: December 8, 2017
    Publication date: April 12, 2018
    Inventors: Jaques Clapauch, Steven J. Perron
  • Patent number: 9940110
    Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jaques Clapauch, Steven J. Perron
  • Patent number: 9916142
    Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: March 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jaques Clapauch, Steven J. Perron
  • Publication number: 20170354553
    Abstract: Absorbent article including a chassis and fastening tab. The fastening tab includes a carrier, a first fastener having first male fastening elements, and a second fastener. The second fastener includes a backing with first and second opposing surfaces, with second male fastening elements on the first surface. A first portion of the second surface of the backing is connected to the carrier, and a second portion of the second surface of the backing is attached to the topsheet side of the chassis. The carrier is attached to the backsheet side of the chassis. Some fastening laminates, before attachment to the article, have the second portion of the second fastener folded over to face the first portion of the second fastener. Other laminates have the second fastener positioned with its first surface toward the carrier and attached to the carrier with a film.
    Type: Application
    Filed: November 17, 2015
    Publication date: December 14, 2017
    Inventors: Mark A. Peltier, Timothy V. Stagg, Leigh E. Wood, Thomas J. Gilbert, Steven J. Perron
  • Patent number: 9782302
    Abstract: A wetness sensor includes a substrate that carries a tuned RF circuit. The circuit includes a conductive pattern applied to the substrate, a capacitor, and a jumper all disposed on a same side of the substrate. The conductive pattern includes an inductive coil, and an inner and outer terminus. The jumper electrically couples the inner terminus to the outer terminus. The jumper also includes a frangible link which, when contacted by a target fluid, produces a drastic change in the operation of the RF circuit. The drastic change can be interpreted by a remote reader as a “wet” condition. Contact of the frangible link by the target fluid may change the impedance or resistance of the RF circuit by at least a factor of 5, 10, 100, or more, and/or may cause the frangible link to disintegrate to produce an open circuit, and/or may substantially render the RF circuit inoperative.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: October 10, 2017
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Justin M. Johnson, Lori-Ann S. Prioleau, Brinda B. Badri, James C. Vanous, Robert D. Lorentz, Jacob D. Chatterton, Steven J. Perron, Donald R. Battles
  • Publication number: 20170252227
    Abstract: A wetness sensor includes a self-supporting substrate and an electrically conductive trace carried by the substrate. The trace is patterned to provide at least a portion of a tuned RF circuit, which may be disposed on only one side of the substrate and characterized by an impedance or resistance. The trace is not self-supporting. The substrate is adapted to dissolve, swell, or otherwise degrade when contacted by a target fluid. Such degradation produces a drastic change in the operation of the RF circuit, which can be interpreted by a remote reader as a “wet” condition. Contact of the substrate by the target fluid may change the impedance or resistance of the RF circuit by at least a factor of 5, 10, 100, or 1000, and/or may cause the trace to disintegrate so as to provide the RF circuit with an open circuit, and/or may substantially render the RF circuit inoperative.
    Type: Application
    Filed: May 18, 2017
    Publication date: September 7, 2017
    Inventors: Lori-Ann S. Prioleau, Justin M. Johnson, Robert D. Lorentz, Brinda B. Badri, James C. Vanous, Jacob D. Chatterton, Steven J. Perron, Donald R. Battles, Badri Veeraraghavan
  • Patent number: 9681996
    Abstract: A wetness sensor includes a self-supporting substrate and an electrically conductive trace carried by the substrate. The trace is patterned to provide at least a portion of a tuned RF circuit, which may be disposed on only one side of the substrate and characterized by an impedance or resistance. The trace is not self-supporting. The substrate is adapted to dissolve, swell, or otherwise degrade when contacted by a target fluid. Such degradation produces a drastic change in the operation of the RF circuit, which can be interpreted by a remote reader as a “wet” condition. Contact of the substrate by the target fluid may change the impedance or resistance of the RF circuit by at least a factor of 5, 10, 100, or 1000, and/or may cause the trace to disintegrate so as to provide the RF circuit with an open circuit, and/or may substantially render the RF circuit inoperative.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: June 20, 2017
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Lori-Ann S. Prioleau, Justin M. Johnson, Robert D. Lorentz, Brinda B. Badri, James C. Vanous, Jacob D. Chatterton, Steven J. Perron, Donald R. Battles, Badri Veeraraghavan
  • Publication number: 20170109149
    Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.
    Type: Application
    Filed: April 28, 2016
    Publication date: April 20, 2017
    Inventors: Jaques Clapauch, Steven J. Perron
  • Publication number: 20170109147
    Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.
    Type: Application
    Filed: October 15, 2015
    Publication date: April 20, 2017
    Inventors: Jaques Clapauch, Steven J. Perron
  • Publication number: 20170060552
    Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure, identifying an L pathway consisting of two or more L nodes, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register splitting instructions are inserted at a starting node of the one or more H pathways. A computer program product and computer system corresponding to the above method are also disclosed herein.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 2, 2017
    Inventor: Steven J. Perron
  • Patent number: 9582255
    Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure, identifying an L pathway consisting of two or more L nodes, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register splitting instructions are inserted at a starting node of the one or more H pathways. A computer program product and computer system corresponding to the above method are also disclosed herein.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Perron
  • Patent number: 9483274
    Abstract: A computer program product for splitting live register ranges includes a computer readable storage medium and program instructions stored on the computer readable storage medium, the program instructions include instructions for identifying one or more H pathways comprising one or more H nodes having high register pressure using a backwards data flow in the graph, identifying an L pathway consisting of two or more L nodes using a depth first search, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway. The register splitting instructions are inserted at a starting node of the one or more H pathways. Register merging instructions are inserted at an ending node of the one or more H pathways.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: November 1, 2016
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Perron
  • Patent number: 9411565
    Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure using a backwards data flow in the graph, identifying an L pathway consisting of two or more L nodes using a depth first search, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway. The register splitting instructions are inserted at a starting node of the one or more H pathways. Register merging instructions are inserted at an ending node of the one or more H pathways.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Perron