Patents by Inventor Steven J. Schlick

Steven J. Schlick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6216182
    Abstract: A system for storing data. The system includes a host for processing the data. The system includes a buffer mechanism for storing data and producing interrupt signals to the host for informing the host there is data in the buffer mechanism for the host to process. The buffer mechanism adapting the production of interrupts based on the speed the host can process data. The host is in contact with the buffer mechanism. A method for serving data. The method includes the steps of storing data in a buffer mechanism. Then there is the step of sending an initial interrupt signal to a host from the buffer mechanism informing the host there is data in the buffer mechanism for the host to process. Next there is the step of transferring data in the buffer mechanism to the host. Then there is the step of processing data from the buffer mechanism with the host. Next there is the step of adapting when a subsequent interrupt signal is sent to the host based on the speed the host can process data.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: April 10, 2001
    Assignee: Fore Systems, Inc.
    Inventors: Nhiem Nguyen, Michael H. Benson, Steven J. Schlick, George Totolos, Jr.
  • Patent number: 6192033
    Abstract: An apparatus for reflecting an f-RM cell as a b-RM cell. The apparatus includes an RM cell processor which is adapted to receive the f-RM cell from an ATM network and modifies ABR information of the f-RM cell to reflect congestion regarding cells on the ATM network. The apparatus includes a transmit scheduler connected to the RM cell processor which forms the b-RM cell from the modified ABR information of the f-RM cell and sends the b-RM cell to the ATM network. The transmit scheduler is decoupled from the RM cell processor. An ATM telecommunications system. A method for reflecting an f-RM cell as a b-RM cell.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: February 20, 2001
    Assignee: FORE Systems, Inc.
    Inventors: Michael H. Benson, Nhiem Nguyen, Steven J. Schlick, George Totolos, Jr.
  • Patent number: 6151321
    Abstract: An ATM communications system. The system includes an ATM network on which ATM cells of ATM packets travel. The system includes a host which produces ATM packets having cells which include at least a payload. The system includes an interface connected to the host which sends ATM cells from the host onto the ATM network. The interface produces read requests to the host for obtaining cells from the host. The interface transfers a partial packet having a plurality of cells from the host to the interface with each read request. The interface has a bus which connects to the host on which communication between the host and the interface occurs. The interface has a transfer mechanism which is connected to the ATM network to send cells to the ATM network. An interface for connection to a host which sends ATM cells from the host to an ATM network. A method for sending ATM cells over an ATM network.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: November 21, 2000
    Assignee: FORE Systems, Inc.
    Inventors: Michael H. Benson, Nhiem Nguyen, Steven J. Schlick, George Totolos, Jr.
  • Patent number: 6026090
    Abstract: An ATM communications system. The system includes an ATM network on which ATM cells of ATM packets travel. The system includes a host having a host memory mechanism preferably having cache lines which stores the cells. The system includes an interface having a receive memory mechanism which stores a partial packet comprising a plurality of cells received from the ATM network. The receive memory mechanism aligns with the host memory mechanism so every transfer from the receive memory mechanism of the plurality of cells to the host memory mechanism fills the host memory mechanism along cache lines of the host memory mechanism. The interface has a bus which connects to the host on which communication between the host and the interface occurs. The interface is connected to the ATM network. A method for sending ATM cells over an ATM network. An interface for a host to receive ATM cells from an ATM communication network.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: February 15, 2000
    Assignee: FORE System, Inc.
    Inventors: Michael H. Benson, Nhiem Nguyen, Steven J. Schlick, George Totolos, Jr.
  • Patent number: 6003062
    Abstract: The present invention pertains to a method for providing service to entities. The method comprises the steps of receiving a first request for service by a server within a predetermined time from a first entity. Next there is the step of receiving a second request for service by the server within the predetermined time from a second entity. Then there is the step of reducing the service to be provided by the server to the first entity so the second entity can be provided service by the server within the predetermined time. The present invention pertains to a system for providing service. The system comprises N entities, where N is greater than or equal to 2. Each of the N entities require service. The system comprises a server which provides service to the N entities. Also, the system comprises a scheduler connected to the entities and the server.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: December 14, 1999
    Assignee: FORE Systems, Inc.
    Inventors: Martin G. Greenberg, Steven J. Schlick