Patents by Inventor Steven Konsek

Steven Konsek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11605758
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 14, 2023
    Assignee: NANOSYS, INC.
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
  • Publication number: 20190221731
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Application
    Filed: January 18, 2019
    Publication date: July 18, 2019
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
  • Patent number: 10217917
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: February 26, 2019
    Assignee: GLO AB
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
  • Publication number: 20170279017
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 28, 2017
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
  • Patent number: 9595649
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 14, 2017
    Assignee: GLO AB
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
  • Publication number: 20140239327
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Application
    Filed: January 30, 2014
    Publication date: August 28, 2014
    Applicant: GLO AB
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Hanberg
  • Patent number: 8766395
    Abstract: A device includes a Schottky barrier formed by a metal-semiconductor junction between a semiconductor nanowire and a metal contact. The metal contact at least partly encloses a circumferential area of each nanowire along the length thereof. The nanowire includes a low doped region that is part of the metal-semiconductor junction. The device can be fabricated using a method where two different growth modes are used, the first step including axial growth from a substrate giving a suitable template for formation of the metal-semiconductor junction, and the second step including radial growth enabling control of the doping levels in the low doped region.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: July 1, 2014
    Assignee: Qunano AB
    Inventor: Steven Konsek
  • Patent number: 8669574
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: March 11, 2014
    Assignee: GLO AB
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Hanberg
  • Publication number: 20120012968
    Abstract: A device according to the invention comprises a Schottky barrier formed by a metal-semiconductor junction between a semiconductor nanowire (1) and a metal contact (5). The metal contact (5) at least partly encloses a circumferential area of each nanowire (1) along the length thereof. The nanowire (2) comprises a lowly doped region that is part of the metal-semiconductor junction. This lowly doped region can be formed by a nanowire segment, by the entire nanowire or in a core-shell configuration with a highly doped nanowire core (3) and the lowly doped region comprised in a shell (4). The device can be fabricated using a method according to the invention, where two different growth modes are used, the first comprising axial growth from a substrate (2) giving a suitable template for formation of the metal-semiconductor junction and the second step comprising radial growth enabling control of the doping levels in the lowly doped region.
    Type: Application
    Filed: March 25, 2010
    Publication date: January 19, 2012
    Applicant: QuNana AB
    Inventor: Steven Konsek
  • Publication number: 20110254034
    Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.
    Type: Application
    Filed: July 7, 2009
    Publication date: October 20, 2011
    Applicant: Glo AB
    Inventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Hanberg
  • Publication number: 20080012047
    Abstract: A two terminal switching device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes a stimulus circuit in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device.
    Type: Application
    Filed: November 15, 2005
    Publication date: January 17, 2008
    Applicant: Nantero, Inc.
    Inventors: Claude Bertin, Mitchell Meinhold, Steven Konsek, Thomas Ruckes, Max Strasburg, Frank Guo, X. M. Huang, Ramesh Sivarajan
  • Publication number: 20060250856
    Abstract: A memory array includes a plurality of memory cells, each of which receives a bit line, a first word line, and a second word line. Each memory cell includes a cell selection circuit, which allows the memory cell to be selected. Each memory cell also includes a two-terminal switching device, which includes first and second conductive terminals in electrical communication with a nanotube article. The memory array also includes a memory operation circuit, which is operably coupled to the bit line, the first word line, and the second word line of each cell. The circuit can select the cell by activating an appropriate line, and can apply appropriate electrical stimuli to an appropriate line to reprogrammably change the relative resistance of the nanotube article between the first and second terminals. The relative resistance corresponds to an informational state of the memory cell.
    Type: Application
    Filed: November 15, 2005
    Publication date: November 9, 2006
    Applicant: Nantero, Inc.
    Inventors: Claude Bertin, Frank Guo, Thomas Rueckes, Steven Konsek, Mitchell Meinhold, Max Strasburg, Ramesh Sivarajan, X. M. Huang
  • Publication number: 20060250843
    Abstract: A non-volatile memory cell includes a volatile storage device that stores a corresponding logic state in response to electrical stimulus; and a shadow memory device coupled to the volatile storage device. The shadow memory device receives and stores the corresponding logic state in response to electrical stimulus. The shadow memory device includes a non-volatile nanotube switch that stores the corresponding state of the shadow device.
    Type: Application
    Filed: November 15, 2005
    Publication date: November 9, 2006
    Applicant: Nantero, Inc.
    Inventors: Claude Bertin, Frank Guo, Thomas Rueckes, Steven Konsek, Mitchell Meinhold, Max Strasburg, Ramesh Sivarajan, X.M. Huang
  • Publication number: 20060237857
    Abstract: Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain or source of the first semiconductor-type FET and the second NTFET connected to the drain or source of the second semiconductor-type FET.
    Type: Application
    Filed: January 13, 2006
    Publication date: October 26, 2006
    Applicant: Nantero, Inc.
    Inventors: Claude Bertin, Mitchell Meinhold, Steven Konsek, Thomas Rueckes, Frank Guo
  • Publication number: 20060183278
    Abstract: Field effect devices having channels of nanofabric and methods of making same. A nanotube field effect transistor is made to have a substrate, and a drain region and a source region in spaced relation relative to each other. A channel region is formed from a fabric of nanotubes, in which the nanotubes of the channel region are substantially all of the same semiconducting type of nanotubes. At least one gate is formed in proximity to the channel region so that the gate may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain and source region. Forming a channel region includes forming a fabric of nanotubes in which the fabric has both semiconducting and metallic nanotubes and the fabric is processed to remove substantially all of the metallic nanotubes.
    Type: Application
    Filed: January 13, 2006
    Publication date: August 17, 2006
    Applicant: Nantero, Inc.
    Inventors: Claude Bertin, Mitchell Meinhold, Steven Konsek, Thomas Rueckes, Frank Guo