Patents by Inventor Steven P. Saneski

Steven P. Saneski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5402479
    Abstract: An office interface unit (OIU) transfers data and signaling between a telephone local exchange and distribution lines. Information from the telephone local exchange is contained in repetitive frames containing signaling time slots which each contain two distinct nibbles of information. The OIU translates each local exchange signaling channel into first and second internal signaling channels, each internal signaling channel containing information representative of one signaling nibble therein. This simplifies DSO time slot interchange in the OIU. In addition, each internal signaling channel is provided with at least one additional significant signaling bit thereby providing additional signaling states so that the OIU equipment can account for multiple types of telephone local exchange equipment easily.
    Type: Grant
    Filed: November 2, 1993
    Date of Patent: March 28, 1995
    Assignee: Raynet Corporation
    Inventors: William F. Ellersick, Steven P. Saneski
  • Patent number: 5196712
    Abstract: A printed circuit board apparatus includes a handle which has an extension plate which extends into an optical switch so as to prevent communication between an optical emitter and optical receiver. To remove the printed circuit board apparatus from its associated rack housing, rotation of the handle is first required which moves the plate and which causes the detector to go HIGH and signal to a telecommunications system that the board is soon to be removed so that a graceful switch can be made from that board to a redundant copy thereof. The printed circuit board apparatus further includes a deflectable lever which contacts to ground the rack housing upon inserting the printed circuit board apparatus into its associated rack housing so as to provide electrostatic discharge protection.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: March 23, 1993
    Assignee: Raynet Corporation
    Inventors: Nguyen T. Nguyen, Sharon Pellerin, Steven P. Saneski
  • Patent number: 5054050
    Abstract: Disclosed is a means for testing drop wires in digital loop systems which employ optical fiber up to a distant terminal near the subscriber's premises. A test module is provided at the distant terminal to determine the presence or absence of faults on the wires to the customer premises. The results of the test are transmitted via an optical data link to the remote terminal where the results can be accessed by a loop tester at the central office.
    Type: Grant
    Filed: April 30, 1990
    Date of Patent: October 1, 1991
    Assignee: American Telephone & Telegraph Co.
    Inventors: Michael E. Burke, Samuel Colodner, Huy T. Luu, Steven P. Saneski
  • Patent number: 4839907
    Abstract: A skew compensation circuit removes skew between a data stream and the clock of a processing module to which the data stream clocked at the same frequency is applied. A delayed data stream is generated. Either the data stream or the delayed data stream is selected to be clocked in the processing module. The selected data stream and a delayed version of the selected data stream are compared at prescribed transitions of the processing module clock to detect differences between the state of the selected data stream signal at the clock transition and the state of the delayed selected data signal. In the event of a detected difference in states, the other of the input data stream and the delayed data stream is selected for clocking in the processing module.
    Type: Grant
    Filed: February 26, 1988
    Date of Patent: June 13, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Steven P. Saneski
  • Patent number: 4575646
    Abstract: A buffer arrangement on an integrated circuit is disclosed which translates the voltage levels of logic signals without distortion. Generally, signal distortion results from the difference between the low-to-high propagation delay and the high-to-low propagation delay through an individual buffer. The arrangement includes two buffers (33, 36) having unknown distorting characteristics, arranged in series-inverting pairs (31, 33; 35, 36). The first buffer (33) generates a predistorted signal from the signal to be translated, which has a delay at each transition due to either the high-to-low or low-to-high propagation delay of that buffer. By inverting (35) and redistorting the predistorted signal through a second buffer (36), each transition in the signal at the output thereof is further delayed due to a propagation delay opposite in type to that which that same transition was delayed by the first buffer.
    Type: Grant
    Filed: June 2, 1983
    Date of Patent: March 11, 1986
    Assignee: AT&T Bell Laboratories
    Inventor: Steven P. Saneski