Abstract: The present invention provides a circuit for detecting and correcting errors in a bit stream. The circuit consist of a plurality of circuit elements, an least operation circuit means, and at least two logic gates. The logic gates receive inputs from the plurality of circuit elements. The plurality of circuit elements are coupled to receive and store a portion of a bit stream. The operation circuit elements perform bitwise operations on the contents of at least two of the circuit elements. The bitwise operations are dictated by a CRC polynomial and are used to perform the CRC error detection division operation. At the end of the division process for the data to be checked, each circuit element corresponds to a bit in a bit error pattern, the logic gates determine if the contents of the circuit elements match specific bit error patterns. The circuit causes the state of at least one bit in the bit stream to change if the contents of the plurality of circuit elements match one of the specific bit patterns.

Abstract: A SONET network interface for interconnecting a high speed unit (HSU) with low speed interface units (LSUs) is provided for enabling transmission of signals therebetween. The interface includes: a bus for interfacing the HSU with each of the LSUs to enable transmission of signals from each of the LSUs to the HSU, and reception of the signals from the HSU to each of the LSUs, wherein the HSU, LSUs, and the bus are contained in a primary shelf. The network interface also has secondary shelves, each containing secondary LSUs and an intershelf ring interconnection (IRI) bus connecting the primary shelf and each of the secondary shelves in series for exchanging data between the HSU of the primary shelf and each of the secondary shelves.

Abstract: The present invention preferably places a hardware circuit between the SCU's ARCNET transceiver and the backplane bus rather than a parallel snooper circuit. This circuit builds the map based on the tokens it observes. When the circuit detects the token for the SCU, it blocks the token transmission to the SCU's ARCNET transceiver. It then sends a minimum length “ping” message to each unit that was present on the bus during the last token rotation, but is not present during the token rotation that just ended. Since units that have lost their token can still respond to a Free Buffer Enquiry message, the circuit can use it as a ping to verify whether the missing unit(s) are actually missing or have just lost their token due to noise. After verification, the token is forwarded to the SCU's ARCNET transceiver.

Abstract: A system for providing 1:n protection for common processing units in a star bus architecture multiplexer or switching system and providing one redundant protection common processing unit to protect up to n working common processing units has a pair of first and second common processing slots (C) for common processing units, a plurality of tributary interface slots (T) for tributary interface units, and at least one universal slot (U) for accommodating either an additional common processing unit or a tributary interface unit. If the working on-line common processing unit of the dedicated pair fails, the protection common processing unit takes over for the failed common processing unit. If one of the additional common processing units fails, the dedicated protection common processing unit takes over, thereby providing 1:n protection regardless of where each common processing unit is located.