Abstract: A Multiprotocol Storage Controller (MPSC) System on a Chip (SOC) comprising multiple heterogeneous network interface ports, a switch core, a global memory mapper and a frame router. The interface ports capable of interconnecting networks of devices with differing data and signaling protocols and differing number of data and signal lines.

Abstract: A Multiprotocol Storage Controller (MPSC) System on a Chip (SOC) comprising multiple heterogeneous network interface ports, a switch core, a global memory mapper and a frame router. The interface ports capable of interconnecting networks of devices with differing data and signaling protocols and differing number of data and signal lines.

Abstract: The invention described herein is a travel luggage identification and recognition system, and methods for its use. The identification systems which are shown and described herein, comprise a combination of three of more sections or labels which include both graphic design aspects, functionality and identification portions which are intended to provide proof of ownership as well as identification and ease of recognition. The travel identifications system assists in the recognition and identification, demonstration of ownership of items such as luggage, bag, travel articles or items shipped on airplanes, trains, buses, cruise ships and other travel items. In addition, our tag or label offers the ability to show proof of ownership with an inside tag or decal that can adhere to the inside of any luggage/bag or travel article.

Abstract: Methods and apparatus for Fibre Channel interconnection is provided between a plurality of private loop devices through a Fibre Channel private loop device interconnect system. In the preferred embodiments, the Fibre Channel private loop device interconnect system is a fabric or an intelligent bridging hub. In one aspect of this invention, a Fibre Channel private loop device is connected to two or more Arbitrated Loops containing, or adapted to contain, one or more private loop devices. Preferably, the interconnect system includes a routing filter to filter incoming Arbitrated Loop physical addresses (ALPAs) to determine which Fibre Channel frames must attempt to be routed through the fabric. Numerous topologies of interconnect systems may be achieved.

Abstract: The Fibre Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fibre Channel. A Fibre Channel Fabric is an entity which transmits Fibre Channel frames between connected Node Ports. The Fibre Channel fabric routes the frames based on the destination address as well as other information embedded in the Fibre Channel frame header. Node Ports are attached to the Fibre Channel Fabric through links.

Abstract: The Fibre Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fibre Channel. A Fibre Channel Fabric is an entity which transmits Fibre Channel frames between connected Node Ports. The Fibre Channel fabric routes the frames based on the destination address as well as other information embedded in the Fibre Channel frame header. Node Ports are attached to the Fibre Channel Fabric through links.

Abstract: The Fibre Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fibre Channel. A Fibre Channel Fabric is an entity which transmits Fibre Channel frames between connected Node Ports. The Fibre Channel fabric routes the frames based on the destination address as well as other information embedded in the Fibre Channel frame header. Node Ports are attached to the Fibre Channel Fabric through links.

Abstract: A method of validation and host buffer allocation for unmapped fiber channel frames. More particularly, the invention encompasses a method of validating unmapped frames, each including a header and a payload, including receiving a frame as a current frame; determining if the current frame is a first frame in a sequence, and if so, saving the header and payload of the current frame in a buffer, and otherwise determining if the current frame is a next expected frame in the sequence; if the current frame is the next expected frame in the sequence, then saving the payload of the current frame in the buffer after the payload of the prior frame; determining if the current frame is a last frame in the sequence, and if so, sending a message to a host indicating receipt of the complete sequence; if the current frame is not the next expected frame in the sequence, then saving the header and payload of the current frame in the buffer, and sending a message to the host indicating receipt of a partial sequence.

Abstract: A communication processor sends and receives frames of data and commands. Transmit and receive protocol engine is controlled by host driver software which utilizes predetermined bits to indicate which frame is the last frame in a series of frames. This information is then placed in the transmit frame before it is sent.

Abstract: A method and apparatus for linking two independent caches which have related information stored therein. Each unit of information stored in a first cache memory is associated with one unit of information stored in the second cache memory. Each unit of information stored in the first cache memory includes a pointer or index to the associated information unit in the second cache memory. Each information unit stored in the second cache is only stored once, regardless of the number of units in the first cache that are associated with a particular unit within the second cache. Therefore, even if more than one unit of information within the first cache memory is associated with the same unit of information within the second cache memory, that unit of information stored in the second cache memory is only stored once.