Patents by Inventor Sture Petersson

Sture Petersson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140027648
    Abstract: The invention relates to a neutron detector (1) comprising a semiconductor detector substrate (10) and a conductive neutron converting layer (20), such as of TiB2. The neutron detector (1) thereby comprises a conductive contact made of a neutron conversion material (20).
    Type: Application
    Filed: May 2, 2012
    Publication date: January 30, 2014
    Inventors: Sture Petersson, Göran Thungström, Stanislav Pospisil, Tomas Slavicek, David Krapohl
  • Patent number: 6744052
    Abstract: A method and device for producing an X-ray pixel detector, for X-ray photons, the detector presenting high efficiency combined with high resolution for obtaining a high image quality detector while at the same time minimizing the X-ray dose used. The application is particularly important whenever the X-ray photon absorption distance is much longer than the required pixel size. The arrangement presents a structure based on light-guiding of secondarily produced photons within a scintillating pixel detector in conjuction with, a CCD or a CMOS pixel detector. The structure presents a matrix (8) having deep pores (10) fabricated by high-aspect ratio silicon etching techniques producing very thin walls and with a pore spacing less or equal to the size of a pixel (2) of the image detector used. The pore matrix is subsequently filled by melting a scintillating material into the pores such that, in each pore, a single scintillating block is formed.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: June 1, 2004
    Inventors: Sture Petersson, Jan Linnros, Christer Fröjdh
  • Patent number: 4740484
    Abstract: A method for manufacturing integrated circuits in which conductors and gate structures are built-up on a substrate plate, the conductors incorporating a layer of polycrystalline silicon and the gate structures including a gate electrode of polycrystalline silicon, where each of the gate structures is surrounded by doped source-and-drain-areas and where the gate electrode and the source-and-drain-areas respectively are metallized by depositing thereon a metal which reacts with the silicon from which the gate electrode and the source-and-drain-areas are comprised, so as to form a silicide layer. In accordance with the invention the gate electrode (3) is metallized in a first process stage. The source-and-drain-areas (18, 19) are metallized in a later process stage. Subsequent to metallizing the gate electrode in the first process stage, a protective layer (5) is applied to the metallized layer (4) of the gate electrode in a second process stage.
    Type: Grant
    Filed: October 30, 1986
    Date of Patent: April 26, 1988
    Assignee: Stiftelsen Institutet for Mikrovagsteknik VID Tekniska Hogskolan I Stockholm
    Inventors: Hans Norstrom, Sture Petersson, Rudolf Buchta