Abstract: Disclosed are a method for separating a growth substrate, a method for manufacturing a light-emitting diode, and the light-emitting diode. The method for separating a growth substrate, according to one embodiment, comprises: preparing a growth substrate; forming a sacrificial layer and a mask pattern on the growth substrate; etching the sacrificial layer by using electrochemical etching (ECE); covering the mask pattern, and forming a plurality of nitride semiconductor stacking structures which are separated from each other by an element separation area; attaching a support substrate to the plurality of semiconductor stacking structures, wherein the support substrate has a plurality of through-holes connected to the element separation area; and separating the growth substrate from the nitride semiconductor stacking structures.

Abstract: Exemplary embodiments of the present disclosure relate to a substrate recycling method and a recycled substrate. The method includes separating a first surface of a substrate from an epitaxial layer; forming a protective layer on an opposing second surface of the substrate; electrochemically etching the first surface of the substrate; and chemically etching the electrochemically etched first surface of the substrate.

Abstract: A vertical memory device includes a substrate, a first cell block and a second cell block. The substrate includes a central region and a peripheral region. At least one first cell block is on the central region. The first cell block includes a first channel and first gate lines. At least one second cell block is on the peripheral region. The second cell block includes a second channel and second gate lines. The second cell block has a width greater than a width of the first cell block. The first and second channel extend in a first direction vertical to a top surface of the substrate. The first gate lines surround the first channel and the first gate lines are spaced apart from each other in the first direction. The second gate lines surround the second channel and are spaced apart from each other in the first direction.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes insulation layers and gate electrodes alternately stacked on a substrate, a vertical channel vertically passing through the insulation layers and the gate electrodes, and a threshold voltage controlling insulation layer, a tunnel insulation layer and a charge storage layer disposed between the vertical channel and the gate electrodes, wherein the threshold voltage controlling insulation layer is disposed between the charge storage layer and the vertical channel and including a material configured to suppress an inversion layer from being formed in the vertical channel.

Abstract: A non-volatile memory device includes a field region that defines an active region in a semiconductor substrate, a floating gate pattern on the active region, a dielectric layer on the floating gate pattern and a control gate on the dielectric layer. The control gate includes a first conductive pattern that has a first composition that crystallizes in a first temperature range, and a second conductive pattern that has a second composition that is different from the first composition and that crystallizes in a second temperature range that is lower than the first temperature range, the first conductive pattern being between the dielectric layer and the second conductive pattern.

Abstract: The present invention relates to a method for separating epitaxial layers and growth substrates, and to a semiconductor device using same. According to the present invention, a semiconductor device is provided which comprises a supporting substrate and a plurality of semiconductor layers provided on the supporting substrate, wherein the uppermost layer of the semiconductor layers has a surface of non-uniform roughness.

Abstract: Exemplary embodiments of the present disclosure relate to a substrate recycling method and a recycled substrate. The method includes separating a first surface of a substrate from an epitaxial layer; forming a protective layer on an opposing second surface of the substrate; electrochemically etching the first surface of the substrate; and chemically etching the electrochemically etched first surface of the substrate.

Abstract: A semiconductor device is provided. The semiconductor includes a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked in a first direction on a substrate. The plurality of interlayer insulating layers and the plurality of gate electrodes constitute a side surface extended in the first direction. A gate dielectric layer is disposed on the side surface. A channel pattern is disposed on the gate dielectric layer. The gate dielectric layer includes a protective pattern, a charge trap layer, and a tunneling layer. The protective pattern includes a portion disposed on a corresponding gate electrode of the plurality of gate electrodes. The charge trap layer is disposed on the protective pattern. The tunneling layer is disposed between the charge trap layer and the channel pattern. The protective pattern is denser than the charge trap layer.

Abstract: A non-volatile memory device includes a field region that defines an active region in a semiconductor substrate, a floating gate pattern on the active region, a dielectric layer on the floating gate pattern and a control gate on the dielectric layer. The control gate includes a first conductive pattern that has a first composition that crystallizes in a first temperature range, and a second conductive pattern that has a second composition that is different from the first composition and that crystallizes in a second temperature range that is lower than the first temperature range, the first conductive pattern being between the dielectric layer and the second conductive pattern.

Abstract: A non-volatile memory device includes a field region that defines an active region in a semiconductor substrate, a floating gate pattern on the active region, a dielectric layer on the floating gate pattern and a control gate on the dielectric layer. The control gate includes a first conductive pattern that has a first composition that crystallizes in a first temperature range, and a second conductive pattern that has a second composition that is different from the first composition and that crystallizes in a second temperature range that is lower than the first temperature range, the first conductive pattern being between the dielectric layer and the second conductive pattern.

Abstract: A non-volatile memory device includes a field region that defines an active region in a semiconductor substrate, a floating gate pattern on the active region, a dielectric layer on the floating gate pattern and a control gate on the dielectric layer. The control gate includes a first conductive pattern that has a first composition that crystallizes in a first temperature range, and a second conductive pattern that has a second composition that is different from the first composition and that crystallizes in a second temperature range that is lower than the first temperature range, the first conductive pattern being between the dielectric layer and the second conductive pattern.