Patents by Inventor Suyoung Bae
Suyoung Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230402523Abstract: A semiconductor device includes first and second active patterns respectively provided on a first and second PMOSFET regions of a substrate, a first channel pattern on the first active pattern, the first channel pattern including first semiconductor patterns stacked and spaced apart from each other, a second channel pattern on the second active pattern, the second channel pattern including second semiconductor patterns stacked and spaced apart from each other, a first gate electrode on the first channel pattern, and a second gate electrode on the second channel pattern. A first concentration of aluminum (Al) or silicon (Si) in an inner gate electrode of the first gate electrode is different from a second concentration of aluminum (Al) or silicon (Si) in an inner gate electrode of the second gate electrode.Type: ApplicationFiled: January 31, 2023Publication date: December 14, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jaeyeol SONG, Ohseong Kwon, Suyoung Bae, Sangyong Kim
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Publication number: 20230361121Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: ApplicationFiled: July 17, 2023Publication date: November 9, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Dongsoo LEE, Wonkeun CHUNG, Hoonjoo NA, Suyoung BAE, Jaeyeol SONG, Jonghan LEE, HyungSuk JUNG, Sangjin HYUN
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Patent number: 11742351Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: GrantFiled: July 26, 2021Date of Patent: August 29, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Dongsoo Lee, Wonkeun Chung, Hoonjoo Na, Suyoung Bae, Jaeyeol Song, Jonghan Lee, HyungSuk Jung, Sangjin Hyun
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Publication number: 20230020176Abstract: A semiconductor device includes a substrate including first and second regions, first and second active patterns provided on the first and second regions, respectively, a pair of first source/drain patterns on the first active pattern and a first channel pattern therebetween, a pair of second source/drain patterns on the second active pattern and a second channel pattern therebetween, first and second gate electrodes respectively provided on the first and second channel patterns, and first and second gate insulating layers respectively interposed between the first and second channel patterns and the first and second gate electrodes. Each of the first and second gate insulating layers includes an interface layer and a first high-k dielectric layer thereon, and the first gate insulating layer further includes a second high-k dielectric layer on the first high-k dielectric layer.Type: ApplicationFiled: June 15, 2022Publication date: January 19, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jaeseoung Park, Wandon Kim, Suyoung Bae, Dongsoo Lee, Dongsuk Shin, Doyoung Choi
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Publication number: 20210358910Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: ApplicationFiled: July 26, 2021Publication date: November 18, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Dongsoo LEE, Wonkeun CHUNG, Hoonjoo NA, Suyoung BAE, Jaeyeol SONG, Jonghan LEE, HyungSuk JUNG, Sangjin HYUN
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Patent number: 11121131Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: GrantFiled: October 3, 2019Date of Patent: September 14, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Dongsoo Lee, Wonkeun Chung, Hoonjoo Na, Suyoung Bae, Jaeyeol Song, Jonghan Lee, HyungSuk Jung, Sangjin Hyun
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Publication number: 20200035678Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: ApplicationFiled: October 3, 2019Publication date: January 30, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Dongsoo LEE, Wonkeun Chung, Hoonjoo Na, Suyoung Bae, Jaeyeol Song, Jonghan Lee, HyungSuk Jung, Sangjin Hyun
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Patent number: 10461167Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: GrantFiled: January 4, 2018Date of Patent: October 29, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Dongsoo Lee, Wonkeun Chung, Hoonjoo Na, Suyoung Bae, Jaeyeol Song, Jonghan Lee, HyungSuk Jung, Sangjin Hyun
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Publication number: 20180374926Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.Type: ApplicationFiled: January 4, 2018Publication date: December 27, 2018Applicant: Samsung Electronics Co., Ltd.Inventors: DONGSOO LEE, WONKEUN CHUNG, HOONJOO NA, SUYOUNG BAE, JAEYEOL SONG, JONGHAN LEE, HYUNGSUK JUNG, SANGJIN HYUN
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Patent number: 9991357Abstract: A semiconductor device includes a semiconductor substrate including multiple active regions having a common conductivity type and separate, respective gate electrodes on the separate active regions. Different high-k dielectric layers may be between the separate active regions and the respective gate electrodes on the active regions. Different quantities of high-k dielectric layers may be between the separate active regions and the respective gate electrodes on the active regions. The different high-k dielectric layers may include different work-function adjusting materials.Type: GrantFiled: June 20, 2016Date of Patent: June 5, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jaeyeol Song, Wandon Kim, Hoonjoo Na, Suyoung Bae, Hyeok-Jun Son, Sangjin Hyun
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Patent number: 9669073Abstract: The present disclosure relates to a composition for promoting immune activity including a protein selected from the group consisting of dimeric proinsulin, C-peptide partially deleted mutant of dimeric proinsulin, and C-peptide partially deleted mutant of monomeric proinsulin as an effective component and a composition for immunosuppression including C-peptide site of proinsulin as an effective component, and the dimeric proinsulin, the C-peptide partially deleted mutant of dimeric proinsulin, and the C-peptide partially deleted mutant of monomeric proinsulin can be applied as immune enhancers to diabetic patients.Type: GrantFiled: March 31, 2015Date of Patent: June 6, 2017Assignee: Konkuk University Industrial Cooperation CorporationInventors: Soohyun Kim, Si-Young Lee, Eunsom Kim, Seunghyun Jo, Youngmin Lee, Tania Azam, Suyoung Bae, Areum Kwak, Jaewoo Hong, Hyun Jhung Jhun, Jong Ho Lee, Jungmin Lee, Sulah Youn, Busun Kim
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Publication number: 20170005175Abstract: A semiconductor device includes a semiconductor substrate including multiple active regions having a common conductivity type and separate, respective gate electrodes on the separate active regions. Different high-k dielectric layers may he between the separate active regions and the respective gate electrodes on the active regions. Different quantities of high-k dielectric layers may be between the separate active regions and the respective gate electrodes on the active regions. The different high-k dielectric layers may include different work-function adjusting materials.Type: ApplicationFiled: June 20, 2016Publication date: January 5, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Jaeyeol SONG, Wandon KIM, Hoonjoo NA, Suyoung BAE, Hyeok-Jun SON, Sangjin HYUN
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Publication number: 20160184402Abstract: The present disclosure relates to a composition for promoting immune activity including a protein selected from the group consisting of dimeric proinsulin, C-peptide partially deleted mutant of dimeric proinsulin, and C-peptide partially deleted mutant of monomeric proinsulin as an effective component and a composition for immunosuppression including C-peptide site of proinsulin as an effective component, and the dimeric proinsulin, the C-peptide partially deleted mutant of dimeric proinsulin, and the C-peptide partially deleted mutant of monomeric proinsulin can be applied as immune enhancers to diabetic patients.Type: ApplicationFiled: March 31, 2015Publication date: June 30, 2016Inventors: Soohyun Kim, Si-Young Lee, Eunsom Kim, Seunghyun Jo, Youngmin Lee, Tania Azam, Suyoung Bae, Areum Kwak, Jaewoo Hong, Hyun Jhung Jhun, Jong Ho Lee, Jungmin Lee, Sulah Youn, Busun Kim
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Patent number: 8054844Abstract: The present invention relates to a communication system and method in a ship area network. In a network of a structure including a plurality of shielded regions, communication is performed between terminals provided in the shielded region by using wireless communication, and communication is performed between terminals provided in different shielded regions by further using power line communication, optical communication, or the power line communication and the optical communication in addition to the wireless communication. Therefore, it is possible to obtain advantages of minimizing inconvenience, which is caused by using only wire communication in the related art, and enlarging a working area.Type: GrantFiled: June 27, 2008Date of Patent: November 8, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Changgyu Lim, Suyoung Bae, Changsik Cho, Dongsun Lim, Hosang Ham
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Publication number: 20100036950Abstract: The present invention relates to a method and apparatus for providing home contents, which shares contents between contents storage devices within a home network and provides the contents shared on a home network to an external contents sharing device. The present invention shares the contents based on an existing home network middleware in a home network environment that is configured to allow a plurality of contents storage devices to commonly use the same home network middleware, such that the contents information shared within the home network can be shared outside, making it possible to use the contents in the home without regard to time and place.Type: ApplicationFiled: June 12, 2009Publication date: February 11, 2010Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Suyoung BAE, Changsik CHO
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Publication number: 20090156159Abstract: The present invention relates to a communication system and method in a ship area network. In a network of a structure including a plurality of shielded regions, communication is performed between terminals provided in the shielded region by using wireless communication, and communication is performed between terminals provided in different shielded regions by further using power line communication, optical communication, or the power line communication and the optical communication in addition to the wireless communication. Therefore, it is possible to obtain advantages of minimizing inconvenience, which is caused by using only wire communication in the related art, and enlarging a working area.Type: ApplicationFiled: June 27, 2008Publication date: June 18, 2009Applicant: Electronics and Telecommunications Research InstituteInventors: Changgyu LIM, Suyoung BAE, Changsik CHO, Dongsun LIM, Hosang HAM