Patents by Inventor Subhash Roy
Subhash Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9537611Abstract: A method and apparatus that improves the performance of a data network by segmenting the TCP path and implementing a proprietary protocol (DPR™) over a network. Bandwidth is reduced and reliability improved by using an erasure coded algorithm to generate a predicted number of redundant coded packets used to reconstruct lost data packets. Coded packets are generated at the transmission side and the coded packets together with the raw data packets successfully sent over the channel are used to reconstruct lost raw data packets. The DPR™ erasure coding to adjust for packet loss in real time protocol provides a multiplexed tunnel for a multiplicity of TCP sessions from a client to a cloud proxy. DPR™ implements congestion management, flow control, reliability, and link monitoring. Other network protocols (such as UDP) are supported with a reliability protocol based upon network coding that improves the transmission reliability.Type: GrantFiled: November 6, 2013Date of Patent: January 3, 2017Assignee: Instart Logic, Inc.Inventors: Igor Zhovnirnovsky, Subhash Roy
-
Patent number: 9515775Abstract: The performance of TCP (and other protocols) is improved in a data network by segmenting the TCP path and implementing a protocol over the network. The protocol provides a multiplexed tunnel for a multiplicity of TCP sessions from a client to a cloud proxy. The protocol implements congestion management, flow control, reliability, and link monitoring. Other network protocols (such as UDP) are supported with a reliability protocol based upon network coding that improves the transmission reliability.Type: GrantFiled: November 7, 2013Date of Patent: December 6, 2016Assignee: Instart Logic, Inc.Inventors: Igor Zhovnirnovsky, Subhash Roy
-
Patent number: 8906728Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.Type: GrantFiled: February 3, 2014Date of Patent: December 9, 2014Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
-
Publication number: 20140209801Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.Type: ApplicationFiled: February 3, 2014Publication date: July 31, 2014Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATIONInventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
-
Patent number: 8792789Abstract: A method is provided for performing chromatic dispersion (CD) compensation. A zero-forcing filter is calculated with a number of taps (n) required to nullify a chromatic dispersion frequency response of an optical channel. The number of taps in the zero-forcing filter is truncated to a number equal to (n?x), where x is an integer greater than 0. In one aspect, the chromatic dispersion frequency response of the optical channel is partitioned into a plurality of constituent chromatic dispersion responses, and a zero-forcing filter is calculated for each of the plurality of constituent chromatic dispersion responses. The number of taps in each of the plurality of zero-forcing filters is truncated, and the CD compensation filter is formed for each of the plurality of truncated tap zero-forcing filters. In another aspect, the tap values of the zero-forcing filter are quantized to a finite quantization set.Type: GrantFiled: March 7, 2012Date of Patent: July 29, 2014Assignee: Applied Micro Circuits CorporationInventors: Badri Varadarajan, Daruish Dabiri, Subhash Roy
-
Patent number: 8766165Abstract: A pattern method is provided for testing an optical lens. The method provides a lens for test, including a first lens surface with a focal plane in object space and a second lens surface with a focal plane in image space. Also provided is a pattern test fixture including an imaging device and a target pattern. The lens is positioned so that the imaging device is located outside the object space focal plane and the target pattern located is outside the image space focal plane. The imaging device, such as a microscope, magnification device, human eye, or camera, is used to view the target pattern. A viewed image representation of the target pattern is received in the imaging device and compared to the target pattern. More typically, the viewed image representation is compared to a target pattern copy.Type: GrantFiled: February 19, 2011Date of Patent: July 1, 2014Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Igor Zhovnirovsky, Subhash Roy
-
Patent number: 8748797Abstract: A method is provided for demultiplexing optical signals. A first photodiode accepts first optical signals in a first range of wavelengths with second optical signals in a second range of wavelengths greater than the first range. First electrical signals are generated in the first photodiode in response to the first optical signals. A second photodiode accepts the second optical signals, and generates second electrical signals in response to the second optical signals. The first photodiode substantially absorbs photons associated with the first optical signal, and substantially passes photons associated with the second optical signals. In one aspect, the first photodiode has a first coefficient of absorption associated with the first range of wavelengths and the second photodiode has a second coefficient of absorption and a half value layer (HVL) associated with the second range of wavelengths. The first photodiode has thickness less than the HVL of the second photodiode.Type: GrantFiled: January 6, 2012Date of Patent: June 10, 2014Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Patrick Decker, Subhash Roy, Igor Zhovnirovsky
-
Publication number: 20140147945Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.Type: ApplicationFiled: February 3, 2014Publication date: May 29, 2014Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATIONInventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
-
Publication number: 20140082935Abstract: A method for placing components on a substrate, the method comprising determining a reference point of a mechanical holding jig based upon a plurality of mechanical features of the mechanical holding jig and placing the substrate into the jig such that mechanical features on the substrate align with the mechanical features on the mechanical holding jig. A location of the substrate is determined with the reference point of the mechanical holding jig. The method continues by installing a plurality of first components onto the substrate aligned to the mechanical holding jig. The substrate is removed from the mechanical holding jig and a second component is placed onto the substrate to cover the plurality of first components. The second component is placed onto the substrate to align a plurality of references points of the second component to the mechanical features on the substrate. The second component is secured to the substrate.Type: ApplicationFiled: October 22, 2012Publication date: March 27, 2014Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATIONInventors: Ezra Gold, Subhash Roy, Igor Zhovnirnovsky
-
Patent number: 8680639Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.Type: GrantFiled: January 23, 2012Date of Patent: March 25, 2014Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
-
Patent number: 8457454Abstract: An optical multi-chip module (MCM) is provided. A printed circuit board (PCB) overlies a package bottom and has die contact regions, each having at least one electrical interface. A first die contact region is formed in a PCB top surface recess, and an optical component die has a bottom surface with an area about matching the PCB top surface recess. The optical component die has an optical port with microlens. An electrical component die has a bottom surface with at least one electrical interface connected to the second die electrical interface, which is connected to the first die electrical interface via a PCB trace. A wire bond is connected between the electrical component die and a package interconnection lead. A cover assembly connector has an optical port with a microlens, configured to communicate with the optical component die optical port, and a fiber port to accept an optical fiber.Type: GrantFiled: September 14, 2011Date of Patent: June 4, 2013Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Subhash Roy, Igor Zhovnirovsky
-
Patent number: 8437085Abstract: An optical element assembly with integrally formed microlens is presented. A wafer is provided with a plurality of adjacent IC optical elements, each optical element having an optical transmission port in a wafer top surface. A microlens array is attached to the wafer top surface, so that each microlens in the array overlies a corresponding optical element optical transmission port. Then, a wafer of optical elements with attached microlenses is formed, where each microlens has a first lens surface adhering directly to a corresponding optical transmission port. Subsequent to forming the wafer of optical elements with attached microlenses, the wafer is diced forming a plurality of optical element assemblies. Each optical element assembly includes an optical element integrally formed with an attached microlens.Type: GrantFiled: September 23, 2011Date of Patent: May 7, 2013Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Igor Zhovnirovsky, Subhash Roy
-
Patent number: 8200094Abstract: A method and system are provided for aligning the optic port of a device having a Free Space Optics (FSO) connector. In a link device with an FSO connector, a controller determines that an optic port alignment procedure is required. A lens is set to an initial wide beam dispersion mode, and a mirror is set to an initial position angle. Note: the lens and mirror may be the FSO connector receive path or transmit path. An optical signal is communicated at a first low baud rate, and the first baud rate communications are optimized by iteratively adjusting the mirror and narrowing the lens focus. Then, an optical signal is communicated at a second baud rate, faster than the first baud rate, and the second baud rate communications are optimized by iteratively adjusting the mirror and narrowing the lens focus.Type: GrantFiled: September 21, 2009Date of Patent: June 12, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy
-
Patent number: 8135281Abstract: A Free Space Optics (FSO) connector is provided with a method for interfacing to an electronic circuit card electrical connector via the FSO connector. The method transceives electrical signals via an electronic circuit card electrical connector. Using an FSO connector, the method converts between electrical signals and optical signals, and transceives optical signals via free space. In one aspect, the optical signals are initially received via free space along a first axis, and reflected along a second axis. Further, the optical signals may be initially transmitted along the second axis and reflected into free space along the first axis. In another aspect, the optical signals are transceived in a plurality of directions in free space. For example, optical signals may be transmitted and received in four mutually-orthogonal axes.Type: GrantFiled: April 11, 2009Date of Patent: March 13, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy, Keith Conroy
-
Patent number: 8113721Abstract: An off-axis misalignment compensating fiber optic cable plug is provided. The plug has a cable interface to engage a fiber optic core end, where the fiber optic core has a cross-sectional area. The plug also includes a lens having a first surface to transceive an optical signal with a jack. The first surface has a cross-sectional area at least 30 times as large as the core cross-sectional area. The lens has a second surface to transceive optical signals with the fiber optic line core end. In one aspect, the lens has an axis and the lens first surface is convex with a radius of curvature capable of receiving an optical signal beam with a beam axis of up to ±2 degrees off from the lens axis. Even 2 degrees off-axis, the lens is able to focus the beam on the fiber optic line core end.Type: GrantFiled: October 19, 2009Date of Patent: February 14, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy
-
Patent number: 8109678Abstract: An optic connector jack is provided with a punch-down fiber optic cable termination. The jack is made up of a housing with a connector mating interface, for connection to a plug connector, and a cradle for receiving a fiber optic cable. The cradle has at least one U-shaped punch-down blade for securing each fiber optic cable with respect to the housing. A crimping plate overlies the cradle and mates to the housing for securing each fiber optic cable in the cradle. The U-shaped punch-down blade has an open top portion, a closed bottom portion, and an inside diameter about equal to a fiber optic cable diameter. The U-shaped punch-down blade has an interior blade edge, the interior blade edge securing a fiber optic cable by slicing into at least a part of the fiber optic cable circumference. In one aspect, the jack includes a lens for each fiber optic cable.Type: GrantFiled: April 7, 2010Date of Patent: February 7, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy
-
Patent number: 8109676Abstract: A fiber optic cable is provided with a cable section including at least one length of fiber optic line having a first end and a second end. A first and second plug each have a mechanical body shaped to selectively engage and disengage a jack housing. Each plug has a microlens with a planar surface to engage the fiber optic line end and a convex surface to transceive light in a first collimated beam with a jack optical interface. The fiber optic cable ends are formed in a focal plane of a corresponding plug microlens.Type: GrantFiled: May 21, 2010Date of Patent: February 7, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy
-
Patent number: 8109677Abstract: Fiber optic cable jacks and plugs are provided. In one aspect, a cable is made from at least one length of fiber optic line having a first end and a second end. A first plug includes a one-piece mechanical body with a cable interface to engage the fiber optic line first end, and a microlens to transceive light with the cable interface. The first plug is shaped to engage a first jack housing. A second plug includes a one-piece mechanical body with a cable interface to engage the fiber optic line second end, and a microlens to transceive light with the cable interface. The second plug is shaped to engage a second jack housing. The mechanical bodies have inner walls that form an air gap cavity interposed between the microlens convex surface and an engaging jack optical interface.Type: GrantFiled: June 1, 2011Date of Patent: February 7, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy, Keith Conroy
-
Patent number: 8109675Abstract: An optical-electrical processing jack is provided. The optical processing jack includes an optical jack with a jack housing having walls and an orifice for mechanically and optically engaging an optical plug housing. A signal bridge, with a bridge element, transceives optical signals between the optical plug and a backcap processing module. The backcap processing module includes a backcap housing with walls, attached to the jack housing and an optical element. The optical element has an optical interface to transceive an optical signal via the signal bridge, and convert optical signals and electrical signals transceived via an electrical interface. In one aspect, the bridge element is a lens with a first surface to transceive an optical signal with the optical plug, and a second surface to transceive the optical signal with the optical element optical interface. For example, the optical element is a photodiode or laser source.Type: GrantFiled: January 5, 2010Date of Patent: February 7, 2012Assignee: Applied Micro Circuits CorporationInventors: Igor Zhovnirovsky, Subhash Roy
-
Publication number: 20110286698Abstract: A fiber optical connector microlens is provided with a self-aligning optical fiber cavity. The microlens includes a convex first lens surface and a second lens surface. A fiber alignment cavity is integrally formed with the second lens surface to accept an optical fiber core. A lens body is interposed between the first and second lens surfaces, having a cross-sectional area with a lens center axis, and the fiber alignment cavity is aligned with the lens center axis. In a first aspect, the fiber alignment cavity penetrates the lens second surface. In a second aspect, an integrally formed cradle with a cradle surface extends from the lens second surface, and a channel is formed in the cradle surface, with a center axis aligned with the lens center axis. The fiber alignment cavity includes a bridge covering a portion of the channel.Type: ApplicationFiled: August 24, 2010Publication date: November 24, 2011Inventors: Reid Greenberg, Igor Zhovnirovsky, Subhash Roy