Patents by Inventor Subhashish Bhattacharya

Subhashish Bhattacharya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11824461
    Abstract: Various examples are provided related to modular multilevel converter (MMC) scale-up control methodologies which can be applied for MV and HV DC applications. In one example, an MMC includes first and second legs each with submodule (SM) groups connected in series, where each SM group includes a plurality of SMs; local group controllers that can control a corresponding SM group; and a central controller that can control output voltage of the MMC via the local group controllers. The local group controllers can provide capacitor voltage balancing (CVB) control of corresponding SM groups.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: November 21, 2023
    Assignee: NORTH CAROLINA STATE UNIVERSITY
    Inventors: Subhashish Bhattacharya, Mohammed Alharbi
  • Publication number: 20220199302
    Abstract: A transformer includes a core formed of at least one MANC alloy. The MANC alloy has a predefined permeability.
    Type: Application
    Filed: April 20, 2020
    Publication date: June 23, 2022
    Inventors: Richard Byron Beddingfield, Paul Richard Ohodnicki, Jr., Kevin Byerly, Subhashish Bhattacharya, Michael Edward McHenry, Jr., Alex Leary
  • Publication number: 20210408937
    Abstract: Various examples are provided related to modular multilevel converter (MMC) scale-up control methodologies which can be applied for MV and HV DC applications. In one example, an MMC includes first and second legs each with submodule (SM) groups connected in series, where each SM group includes a plurality of SMs; local group controllers that can control a corresponding SM group; and a central controller that can control output voltage of the MMC via the local group controllers. The local group controllers can provide capacitor voltage balancing (CVB) control of corresponding SM groups.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 30, 2021
    Inventors: Subhashish Bhattacharya, Mohammed Alharbi
  • Patent number: 11196338
    Abstract: Various examples are provided related to semiconductor topologies and devices that can be used for soft starting and active fault protection of power converters. In one example, an active switch device includes an active switch having a gating control input; and a thyristor having a gating control input. The thyristor is coupled in parallel with the active switch. The active switch can be an IGBT, MOSFET, or other appropriate device. In another example, a power converter can include the active switch devices and switching control circuitry coupled to gating control inputs of the active switch devices.
    Type: Grant
    Filed: December 29, 2018
    Date of Patent: December 7, 2021
    Assignee: North Carolina State University
    Inventors: Richard B. Beddingfield, Subhashish Bhattacharya
  • Publication number: 20210375536
    Abstract: Various examples are provided related to mixed material magnetic cores, which can be utilized for shielding of eddy current induced excess losses. In one example, a magnetic core includes a ribbon core and leakage prevention or redirection shielding surrounding at least a portion of the ribbon core. The leakage prevention or redirection shielding can be positioned adjacent to the ribbon core and between the ribbon core and a magnetomotive force (MMF) source such as, e.g., a coil. The leakage prevention or redirection shielding extend beyond the ends of the MMF source and, in some implementations, can extend over the ends of the MMF source. In another example, a magnetic device can include a ribbon core, a MMF and leakage prevention or redirection shielding positioned between the MMF source and the ribbon core.
    Type: Application
    Filed: November 6, 2018
    Publication date: December 2, 2021
    Applicant: UNITED STATES DEPARTMENT OF ENERGY
    Inventors: Richard B. Beddingfield, Subhashish Bhattacharya, Paul Richard Ohodnicki, Kevin Michael Byerly
  • Patent number: 11063579
    Abstract: A circuit for testing an electronic component, such as a transformer, includes at least two power supplies and at least two H bridge circuits. A first H bridge circuit is conductively coupled in parallel to a first power supply. A second H bridge circuit is conductively coupled in parallel to a second power supply. The second H bridge circuit includes one or more anti-series diodes for preventing current from the first power supply from passing through the second H bridge circuit to the second power supply. The first H bridge circuit and the second H bridge circuit are configured to conductively couple to the electronic component for providing a voltage with a predefined waveform to the electronic component.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: July 13, 2021
    Assignee: North Carolina State University
    Inventors: Richard B. Beddingfield, Subhashish Bhattacharya, David Storelli
  • Publication number: 20210012944
    Abstract: Various examples are provided related to transformer designs that offer very high isolation while maintaining high coupling between the windings. In one example, an isolation transformer includes a first excitation coil wound around a first core and a second excitation coil wound about a second core. The second core is electrically separated from the first core by a high resistivity magnetic material or a non-conductive material. The first and second cores can include corresponding core segments arranged in a trident geometry or a quindent geometry. The core segments can align when the first excitation coil is inserted into a void of the second excitation coil. The isolation transformer designs are mechanically separable which can result in safe, energized, plug operations.
    Type: Application
    Filed: July 8, 2020
    Publication date: January 14, 2021
    Inventors: Richard Byron Beddingfield, Subhashish Bhattacharya, Tsz Sing Wong, Paul Ohodnicki
  • Publication number: 20200382010
    Abstract: A circuit for testing an electronic component, such as a transformer, includes at least two power supplies and at least two H bridge circuits. A first H bridge circuit is conductively coupled in parallel to a first power supply. A second H bridge circuit is conductively coupled in parallel to a second power supply. The second H bridge circuit includes one or more anti-series diodes for preventing current from the first power supply from passing through the second H bridge circuit to the second power supply. The first H bridge circuit and the second H bridge circuit are configured to conductively couple to the electronic component for providing a voltage with a predefined waveform to the electronic component.
    Type: Application
    Filed: November 8, 2018
    Publication date: December 3, 2020
    Inventors: RICHARD B. BEDDINGFIELD, SUBHASHISH BHATTACHARYA, DAVID STORELLI
  • Publication number: 20200343809
    Abstract: Various examples are provided related to semiconductor topologies and devices that can be used for soft starting and active fault protection of power converters. In one example, an active switch device includes an active switch having a gating control input; and a thyristor having a gating control input. The thyristor is coupled in parallel with the active switch. The active switch can be an IGBT, MOSFET, or other appropriate device. In another example, a power converter can include the active switch devices and switching control circuitry coupled to gating control inputs of the active switch devices.
    Type: Application
    Filed: December 29, 2018
    Publication date: October 29, 2020
    Inventors: Richard B. Beddingfield, Subhashish Bhattacharya
  • Patent number: 10734914
    Abstract: Various examples are provided related to fault-tolerant controller architectures for multi-level converters. In one example, a multi-level converter includes an array of power modules. The power modules can include a controller communicatively coupled to controllers of adjacent power modules in the array of power modules. Circuitry of the controllers can receive operational data from the adjacent power modules; identify a fault condition in an adjacent power module using the operational data; and initiate reconfiguration of the array of power modules in response to an indication of the fault condition, where the reconfiguration bypasses the adjacent power module. In another example, a method includes identifying a fault condition in an adjacent power module in an array of power modules based upon operational data from one or more adjacent power modules of the array; and initiating reconfiguration of the array of power modules in response to an indication of the fault condition.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: August 4, 2020
    Assignee: North Carolina State University
    Inventors: Ali Azidehak, Subhashish Bhattacharya
  • Patent number: 10522306
    Abstract: Disclosed herein are methods and systems for causing a zero-current crossing in an electrical circuit. The circuit can be a DC circuit in which case a switch is caused to open at or nearly at the zero crossing. Alternatively, the circuit can be an AC circuit.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: December 31, 2019
    Assignee: North Carolina State University
    Inventors: Leonard W. White, Subhashish Bhattacharya
  • Publication number: 20190296654
    Abstract: Various examples are provided related to fault-tolerant controller architectures for multi-level converters. In one example, a multi-level converter includes an array of power modules. The power modules can include a controller communicatively coupled to controllers of adjacent power modules in the array of power modules. Circuitry of the controllers can receive operational data from the adjacent power modules; identify a fault condition in an adjacent power module using the operational data; and initiate reconfiguration of the array of power modules in response to an indication of the fault condition, where the reconfiguration bypasses the adjacent power module. In another example, a method includes identifying a fault condition in an adjacent power module in an array of power modules based upon operational data from one or more adjacent power modules of the array; and initiating reconfiguration of the array of power modules in response to an indication of the fault condition.
    Type: Application
    Filed: March 25, 2019
    Publication date: September 26, 2019
    Inventors: Ali Azidehak, Subhashish Bhattacharya
  • Publication number: 20170345587
    Abstract: Disclosed herein are methods and systems for causing a zero-current crossing in an electrical circuit. The circuit can be a DC circuit in which case a switch is caused to open at or nearly at the zero crossing. Alternatively, the circuit can be an AC circuit.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 30, 2017
    Inventors: Leonard W. White, Subhashish Bhattacharya
  • Publication number: 20140341582
    Abstract: Systems and methods for single wavelength with dual channels for control signal and Internet data transmission are disclosed. According to an aspect, a network unit may include a communications module configured to receive a single wavelength signal having first and second channels. The first channel may carry Internet data. The second channel may carry power grid control and monitoring data. Further, the network unit may include a multiplexer configured to multiplex the Internet data and the power grid control and monitoring data.
    Type: Application
    Filed: March 10, 2014
    Publication date: November 20, 2014
    Applicant: North Carolina State University
    Inventors: Leda M. Lunardi, Subhashish Bhattacharya, Tie Wu
  • Patent number: 5757099
    Abstract: A parallel hybrid active filter system for harmonic compensation of large non-linear loads is provided. The hybrid filter includes a passive filter connected in series with an inverter that is controlled to produce a dynamically variable inductance at selected harmonic frequencies. The passive filter may include passive capacitive and inductive elements, or may include a power factor correction capacitor alone, with all the inductance for the hybrid filter provided by the active filter inverter. The active filter inverter is controlled to provide the dynamically variable inductance by a synchronous reference frame (SRF) based controller that generates active filter inverter voltage commands that are fed to a PWM or square wave modulated voltage source inverter (VSI).
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: May 26, 1998
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Po-Tai Cheng, Subhashish Bhattacharya, Deepakraj M. Divan
  • Patent number: 5731965
    Abstract: A hybrid parallel active/passive filter system is provided which provides line power harmonic isolation and compensation for power systems connected to high power non-linear loads. The hybrid filter includes a passive filter connected in series with an active filter inverter. The active filter inverter is controlled to generate inverter voltages such that the filter terminal voltage tracks the supply voltage harmonics at a selected dominant harmonic frequency to regulate the supply current harmonics to zero. A synchronous reference frame (SRF) based controller is used to generate harmonic inverter voltage commands based on measured supply current values. A feed forward command signal generator may be used to improve the response of the control system. The active filter inverter is preferably implemented as a square-wave inverter. The active filter inverter DC bus is controlled to achieve power balancing and to provide real power to compensate for losses of the inverter.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: March 24, 1998
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Po-Tai Cheng, Subhashish Bhattacharya, Deepakraj M. Divan
  • Patent number: 5513090
    Abstract: The apparatus includes an active filter, coupled in series, and a passive filter, coupled in parallel, to a power distribution network. The power distribution network includes a voltage source that induces input currents at a first end of the power distribution network. Nonlinear loads and other conditions on the power distribution network cause unbalanced power signals. The active filter controller of the invention uses synchronous transformations on the input currents to identify a negative sequence fundamental signal and a positive sequence fundamental signal, while filtering all harmonic components within the input currents. The negative sequence fundamental signal and the positive sequence fundamental signal are combined to form an active filter reference signal which is applied to the active filter. In response to the active filter reference signal, the active filter operates as a current controlled harmonic voltage source, carrying only the fundamental current, while only injecting harmonic voltages.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: April 30, 1996
    Assignee: Electric Power Research Institute, Inc.
    Inventors: Subhashish Bhattacharya, Deepakraj M. Divan
  • Patent number: 5465203
    Abstract: A power line conditioner includes an active filter coupled, in series, and a passive filter coupled, in parallel, to a three-phase power distribution network. The three-phase power distribution network includes a voltage source that induces three-phase input currents at a first end of the three-phase power distribution network. A load, circulating three-phase load currents, is positioned at a second end of the three-phase power distribution network. The active filter controller of the invention uses synchronous transformations to identify selected harmonic reference components corresponding to individual harmonics of the three-phase load currents. The selected harmonic reference components are multiplied by a predetermined factor corresponding to a permissible percentage of the individual harmonics that may be injected into the supply voltage. This results in active filter reference signal components that are applied to the active filter.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: November 7, 1995
    Assignee: Electric Power Research Institute, Inc.
    Inventors: Subhashish Bhattacharya, Deepakraj M. Divan