Abstract: The present invention provides devices and methods for laparoscopic access and wound closure. The device is in the form of a unitary needle device, which enables performance of several tasks, including penetration or puncture of fascia layers, insufflation of a body cavity with gas, and placing a suture for wound closure. In particular, the device features a blunt-tipped stylet having a hook or notch at the proximal end, which can be used to capture a suture.

Abstract: A connector hub for a needle assembly, the connector hub comprising a first portion located at a first end section of the connector hub, the first portion comprising a first longitudinal axis, a second portion located at a second end section of the connector hub opposite the first end, the second portion comprising a second longitudinal axis, a medial portion located at a middle section of the connector hub between the first and second end sections, the medial portion comprising a medial longitudinal axis arranged at an angle relative to the first longitudinal axis, and arranged at an angle relative to the second longitudinal axis, and at least one insertion port located on the medial portion, wherein the insertion port comprises an insertion port longitudinal axis, wherein the insertion port longitudinal axis is arranged at an angle relative to the medial longitudinal axis.

Abstract: Systems and methods for placement of an introducer needle into the subclavian vein. A needle for subclavian vein penetration includes a straight needle portion, a bent needle portion, and a hub. The bent portion allows for needle placement with minimized chance of complications. The needle and hub form a lumen through which a guide wire can be placed. The bent needle portion has an inner diameter substantially similar to the inner diameter of the straight needle portion to reduce resistance due to movement of the guide wire.

Abstract: In order to realize some of the advantages described above, there is provided a computer-implemented method for verification of an intellectual property (IP) core in a system-on-chip (SoC). The method comprises generating a plurality of verification specific abstracted views of the IP core each of the plurality of verification specific abstracted views having a plurality of verification specific attributes at an input/output (I/O) interface of each of the abstracted view of the IP-core. A unified abstracted view of the IP-core is generated.